ServoISR- Is it really clearing the Interrupt Pending flag?

Hello! In an attempt to create my own servo ISR that manually sets pins high and low rather than depending on the timer, I decided to go through the existing servoISR code to see how it's done. I am confused by a line that claims to be clearing a flag:

Servo.cpp

Line 59-60

   /* clear the interrupt (by writing 0 to IP bit of the control register) */
    aux_reg_write(ARC_V2_TMR1_CONTROL, ARC_V2_TMR_CTRL_NH | ARC_V2_TMR_CTRL_IE);

Line 113-114

   /* count only when not halted for debug and enable interrupts */
    aux_reg_write(ARC_V2_TMR1_CONTROL, ARC_V2_TMR_CTRL_NH | ARC_V2_TMR_CTRL_IE);

Here are some definitions:

aux_regs.h 
#define ARC_V2_TMR1_CONTROL     0x101

conf.h
#define ARC_V2_TMR_CTRL_IE	0x1		/* interrupt enable */
#define ARC_V2_TMR_CTRL_NH	0x2		/* count only while not halted */
#define ARC_V2_TMR_CTRL_W	0x4		/* watchdog mode enable */
#define ARC_V2_TMR_CTRL_IP	0x8		/* interrupt pending flag */
#define aux_reg_write(reg, val) __builtin_arc_sr((unsigned int)val, reg)

Can anyone explain what line 60 in Servo.cpp is really doing?

It seems like this is happening:
ARC_V2_TMR_CTRL_NH | ARC_V2_TMR_CTRL_IE = 10 | 1 = 11
so we would be writing the value '3' to register ARC_V2_TMR1_CONTROL.

Shouldn't it be something like:
aux_reg_write(ARC_V2_TMR1_CONTROL, (0 << ARC_V2_TMR_CTRL_IP))

Another thing to note is that rather than actually clearing that interrupt pending flag, we are actually just calling timer1_init_servo every time we want to set a new limit and reconnecting the ISR to the timer. Is this correct or a best known method?

Thanks!