Shield with RTC and NVRAM

I have several I2C RTC/NVRAM combo shields, designed for a custom sensor network.
After finishing the project, I decided to offer a modified version for sale to the general public.
But in the meantime, I have several original boards, which I am willing to part with for cost + postage.

What you get for $20 US …

Real Time Clock (year month day hour minute second), with 48 hour backup capacitor.
32K of High Speed Non Volatile Memory
Two 16 bit counters (3.3 volt inputs, 10 Mhz max pulse rate)
5 volt to 3.3 volt I2C level translator (use it to talk to those 3.3 volt devices with your 5 volt Arduino)
Library with simple functions for date, time, counters and storage, and a high speed option which uses a 4x I2C clock rate.

The storage consists of Ferro-Electric RAM. This memory provides non-volatile storage like EEPROM or FLASH, but unlike them it has virtually unlimited write cycle endurance, and no wait states on writing. This shield with the provided library supports a sustained write rate of 33 Kbytes per second… which is about as fast as an Atmega can transfer data over the I2C bus (in 4x mode).

The shields are also designed to handle up to 3 extra 128K NVRAM chips (RAMTRON FM24V10).
You can populate the pads yourself, if you are comfortable soldering surface mount components.
Or order the shield pre-populated, $14 per chip. A fully loaded shield, with RTC and 416K, will cost $60.

The shield is stackable, but has no reset button, as it was designed to stack under an Ethernet shield.
The counter inputs are brought out to a 3 pin female header (cntr 1, grnd, cntr2).
Likewise the level translator is brought out to a female header (clock, grnd, data).

If you are interested, PM me with any questions you may have.

Hi
How a bout a diagram and some pictures?

You got it.

http://swfltek.com/framshield.html

Hmm, interesting…

This could prove useful but I have limited knowledge of how to control such a board. How is each chip addressed under i2c? (code examples?) - showing my lack of knowledge using i2c.

Mowcius

The library provided with the shield makes the (up to) 4 physical chips appear as one large contiguous address space. But, for the curious, here are the long-winded REMs for a short piece of code :-?


The addressing of I2C devices is often a source of confusion.
The I2C protocol specifies each device to have a 7 bit address.
But the bus works in byte units.
When beginning a transaction, the 7 bit address is shifted left one bit to form a byte, and bit zero of that byte is then used to signal a Read (1), or Write (0).

This discussion will use the 7 bit convention.


In the case of the 128K devices used here, each chip has a ‘base’ I2C address of 0x50, or 101 0000 binary.

Each chip has two pins which are used to assign a two bit offset from the base address.
Those are assigned to bit positions 2 and 1 of the chip address.
A chip with both offset inputs pulled high would have the address 101 0110 binary.

Each chip has two ‘pages’ of memory, 64K bytes in size.
Address bit 0 is used to signal which page is to be addressed.
To access the last page in a 4 chip shield, the address would therefore be 101 0111 binary.

After transmitting the chip address (plus Read/Write bit), the next two bytes transmitted signify the 16 bit address of the memory location, or register, to be accessed within the selected page of the selected chip.

The possible memory space thus requires 19 bits… 2 bit chip number, 1 bit page number, and 16 bit address within the page.

219 = 524288, or 512K.

3 of those bits are combined with the base address to form the I2C address, the remaining 16 bits are transmitted immediately afterwards.


This all sounds a lot more complicated than it really is.

To make the 4 smaller chips appear as one big chip, you just drop the lowest 16 bits (right shift), and OR the result with the base address.

The code to do this is a short one liner.

To access a particular chip inside the virtual 512K space…

chip_address = virtual_address >> 16 | 0x50

The code in the provided library is a tad more complicated, to allow for the presence (or not) of the RTC chip which, although having only 32K storage, grabs a full 128K address space.

showing my lack of knowledge using i2c.

Well I suppose my knowledge is a bit greater now but I only got half of that :sunglasses:

I will read up a bit more on it…

I have a duino644: Wise time with Arduino: Buy Duino644 kit that has an RTC and EEPROM and I also have a libelium microSD card ‘shield’ for storage.

This board would be a step-up for a upcoming project to provide faster data storage and/or more read/writes

Mowcius

Mowcius,

Since you are in the great pantheon of Arduino gods, allow me to cut you a special deal. :wink:

PM me with an address to ship a parcel to.
In the box you will find…

a FRAM Shield with 256K storage (two 128K chips),
a CD with library and example sketches,
a check to cover return postage from the UK to the US.

Use it for a month.

If you decide its not for you, cash the check, and use the funds to return the board.

If you decide to keep it, send me $38 .

$38 is fine
I have sent you a PM

Mowcius