I'm sure that there is a setting deep in the USART control registers that allow you to invert the hardware serial.
I don't think so. Section 20 clearly states in several places that the Idle state is high, and it looks for low Start bit to start receiving and finishes a transmission with one or two low stop bits.
• Full Duplex Operation (Independent Serial Receive and Transmit Registers)
• Asynchronous or Synchronous Operation
• Master or Slave Clocked Synchronous Operation
• High Resolution Baud Rate Generator
• Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
• Odd or Even Parity Generation and Parity Check Supported by Hardware
• Data OverRun Detection
• Framing Error Detection
• Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
• Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete
• Multi-processor Communication Mode
• Double Speed Asynchronous Communication Mode
Nothing in the features about inverted logic, nothing in the text that follows.
7404 will be quote power hungry, consider 74ACT04 instead, it's also a much better driver, +/-24mA output.