[SOLVED] 3.5'' TFT LCD Shield for the UNO to the Nano Every

Using Arduino Displays
1

Dear David,

Hello! I am currently trying to interface the LCD shield from the UNO to the Nano Every. It currently is a white screen and reads an ID of 0x0 when using the "tft.readID()" command. I am writing this post since my other post got removed as spam.

I have edited the mcfriend_shield.h file from your library to include the AVR_Atmega4809 so that it can compile with the Nano Every.

I am using this screen: 3.5inch Arduino Display-UNO - LCD wiki

Here is the edited mcufriend_shield.h:

//#define USE_SPECIAL             //check for custom drivers

#define WR_ACTIVE2  {WR_ACTIVE; WR_ACTIVE;}
#define WR_ACTIVE4  {WR_ACTIVE2; WR_ACTIVE2;}
#define WR_ACTIVE8  {WR_ACTIVE4; WR_ACTIVE4;}
#define RD_ACTIVE2  {RD_ACTIVE; RD_ACTIVE;}
#define RD_ACTIVE4  {RD_ACTIVE2; RD_ACTIVE2;}
#define RD_ACTIVE8  {RD_ACTIVE4; RD_ACTIVE4;}
#define RD_ACTIVE16 {RD_ACTIVE8; RD_ACTIVE8;}

#if defined(USE_SPECIAL)
#include "mcufriend_special.h"
#if !defined(USE_SPECIAL_FAIL)
#warning WE ARE USING A SPECIAL CUSTOM DRIVER
#endif
#endif
#if !defined(USE_SPECIAL) || defined (USE_SPECIAL_FAIL)

#if 0
//################################### NANO EVERY/ATmega4809 ##############################
#elif defined(__AVR_ATmega4809__)
#warning  HELLOOO
#define RD_PORT VPORTD //Analog pins
#define RD_PIN  0
#define WR_PORT VPORTD
#define WR_PIN  1
#define CD_PORT VPORTD
#define CD_PIN  2
#define CS_PORT VPORTD
#define CS_PIN  3
#define RESET_PORT VPORTD
#define RESET_PIN  4

//MASKS FOR OUTPUT 8 pins of LCD_D#  
#define AMASK         0x03    //0000 0011           //more intuitive style for mixed Ports
#define BMASK         0x07    //0000 0111
#define CMASK         0x40    //0100 0000
#define FMASK         0x30    //0011 0000

//Write 8 bits. NANO EVERY uses PORTS B,E,A,F,C ...
//Since we only want our port pins we can have the following: PB0[D9], PB1[D10], PA1[D7], PF4[D6], PB2[D5], PC6[D4], PF5[D3], PA0[D2]... [] is on board digital pin
//Arranging by PORT:   PA1[D7], PA0[D2];     PB2[D5], PB1[D10], PB0[D9];    PC6[D4];    PF5[D3], PF4[D6];  
//x is our input 8 bits
#define write_8(x)  { VPORTA_OUT =  (VPORTA_OUT = (VPORTA_OUT & ~AMASK) | ((x) & AMASK)); \
                      VPORTB_OUT =  (VPORTB_OUT = (VPORTB_OUT & ~BMASK) | ((x) & BMASK)); \
                      VPORTC_OUT =  (VPORTC_OUT = (VPORTC_OUT & ~CMASK) | ((x) & CMASK)); \
                      VPORTF_OUT =  (VPORTF_OUT = (VPORTF_OUT & ~FMASK) | ((x) & FMASK)); \
                    }
                    //

//TO have our 8 bits of LCD_D7,D6,D5,D4,D3,D2,D1,D0 we have:
//PA1[LCD_D7], PF4[LCD_D6], PB2[LCD_D5], PC6[LCD_D4], PF5[LCD_D3], PA0[LCD_D2], PB0[LCD_D1], PB1[LCD_D0]
//                                              0000 0000
//get pA1 to position 7, shift left 6  //0000 00a0 = a000 0000
//get PF4 to position 6, shift left 2  //000f 0000 = 0f00 0000
//get PB2 to position 5, shift left 3  //0000 0b00 = 00b0 0000
//get PC6 to position 4, shift right 2 //0a00 0000 = 000a 0000
//get PA0 to position 2, shift left 2  //0000 000a = 0000 0a00
//get PB0 to position 1, shift left 1  //0000 000b = 0000 00b0
//get PB1 to position 0, shift right 1 //0000 00b0 = 0000 000b 
//afba fabb !! CORRECT
#define read_8()      ( ((VPORTA_IN & (0x02)) << 6)\
                      | ((VPORTF_IN & (0x10)) << 2)\
                      | ((VPORTB_IN & (0x04)) << 3)\
                      | ((VPORTC_IN & (0x40)) >> 2)\
                      | ((VPORTF_IN & (0x20)) >> 2)\
                      | ((VPORTA_IN & (0x01)) << 2)\
                      | ((VPORTB_IN & (0x01)) << 1)\
                      | ((VPORTB_IN & (0x02)) >> 1)\
                      )
                        //Set the direction for the LDC_D# ports as outputs
#define setWriteDir() { VPORTA_DIR |=  AMASK; VPORTB_DIR |=  BMASK; VPORTC_DIR |= CMASK; VPORTF_DIR |= FMASK;}
                        //Set the direction for the thers as inputs
#define setReadDir()  { VPORTA_DIR |=  ~AMASK; VPORTB_DIR |=  ~BMASK; VPORTC_DIR |= ~CMASK; VPORTF_DIR |= ~FMASK;}

//Unsure what WR_STROBE is
#define write8(x)     { write_8(x); WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

//Unsure, but exists in only AtMega MCU's
#define PIN_LOW(p, b)        (p &= ~(1<<(b)))
#define PIN_HIGH(p, b)       (p |= (1<<(b)))
#define PIN_OUTPUT(p, b)     (p |= (1<<(b)))

//################################### UNO ##############################
#elif defined(__AVR_ATmega328P__)       //regular UNO shield on UNO
#define RD_PORT PORTC
#define RD_PIN  0
#define WR_PORT PORTC
#define WR_PIN  1
#define CD_PORT PORTC
#define CD_PIN  2
#define CS_PORT PORTC
#define CS_PIN  3
#define RESET_PORT PORTC
#define RESET_PIN  4

#define BMASK         0x03    //0000 0011          //more intuitive style for mixed Ports
#define DMASK         0xFC    //1111 1100          //does exactly the same as previous
                        
                      //UNO uses port B and D mix. it uses B's: 1,0 and D's: 7 to 2 pins  
                      //PORTB = (bbbb bbbb & 1111 1100) = bbbb bb00 , PORTD = (dddd dddd & 0000 0011) = 0000 00dd
                      //x is 8 bit writing output. and is masked! ie: (x) & BMASK = xxxx xxxx & 0000 0011 = 0000 00xx
                      //Therefore, PORTB = (bbbb bb00 | 0000 00xx) = bbbb bbxx; PORTD = 0000 00dd | xxxx xx00 = xxxx xx00
                      //Thus we only edit the pins of our respective ports as we want to.  
#define write_8(x)    { PORTB = (PORTB & ~BMASK) | ((x) & BMASK); PORTD = (PORTD & ~DMASK) | ((x) & DMASK); }

                        //Gives the value of PD7,PD6,PD5,PD4,PD3,PD2,PB1,PB0 == LCD_D7,D6,D5,D4,D3,D2,D1,D0 thus your 8 bits.
#define read_8()      ( (PINB & BMASK) | (PIND & DMASK) )
                       //We set the direction of our PORTS! DDR = Data Direction Register (A,B,C...) 1 = output, 0 = input
                       //DDRB = bbbb bbbb | 0000 0011 = PB1 PB0 are outputs
#define setWriteDir() { DDRB |=  BMASK; DDRD |=  DMASK; }
#define setReadDir()  { DDRB &= ~BMASK; DDRD &= ~DMASK; }
#define write8(x)     { write_8(x); WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

#define PIN_LOW(p, b)        (p) &= ~(1<<(b))
#define PIN_HIGH(p, b)       (p) |= (1<<(b))
#define PIN_OUTPUT(p, b)     *(&p-1) |= (1<<(b))

//################################### MEGA2560 ##############################
#elif defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__)       //regular UNO shield on MEGA2560
#define RD_PORT PORTF
#define RD_PIN  0
#define WR_PORT PORTF
#define WR_PIN  1
#define CD_PORT PORTF
#define CD_PIN  2
#define CS_PORT PORTF
#define CS_PIN  3
#define RESET_PORT PORTF
#define RESET_PIN  4

#define EMASK         0x38
#define GMASK         0x20
#define HMASK         0x78
#define write_8(x)   {  PORTH &= ~HMASK; PORTG &= ~GMASK; PORTE &= ~EMASK; \
                        PORTH |= (((x) & (3<<0)) << 5); \
                        PORTE |= (((x) & (3<<2)) << 2); \
                        PORTG |= (((x) & (1<<4)) << 1); \
                        PORTE |= (((x) & (1<<5)) >> 2); \
                        PORTH |= (((x) & (3<<6)) >> 3); \
					 }

#define read_8()      ( ((PINH & (3<<5)) >> 5)\
                      | ((PINE & (3<<4)) >> 2)\
                      | ((PING & (1<<5)) >> 1)\
                      | ((PINE & (1<<3)) << 2)\
                      | ((PINH & (3<<3)) << 3)\
                      )
#define setWriteDir() { DDRH |=  HMASK; DDRG |=  GMASK; DDRE |=  EMASK;  }
#define setReadDir()  { DDRH &= ~HMASK; DDRG &= ~GMASK; DDRE &= ~EMASK;  }
#define write8(x)     { write_8(x); WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

#define PIN_LOW(p, b)        (p) &= ~(1<<(b))
#define PIN_HIGH(p, b)       (p) |= (1<<(b))
#define PIN_OUTPUT(p, b)     *(&p-1) |= (1<<(b))

//################################# ZERO and M0_PRO ############################
#elif defined(__SAMD21G18A__)   //regular UNO shield on ZERO or M0_PRO
#include "sam.h"
 // configure macros for the control pins
#define RD_PORT PORT->Group[0]
#define RD_PIN  2
#define WR_PORT PORT->Group[1]
#define WR_PIN  8
#define CD_PORT PORT->Group[1]
#define CD_PIN  9
#define CS_PORT PORT->Group[0]
#define CS_PIN  4
#define RESET_PORT PORT->Group[0]
#define RESET_PIN  5
 // configure macros for data bus
#define DMASK 0x0030C3C0
 //  #define write_8(x) PORT->Group[0].OUT.reg = (PORT->Group[0].OUT.reg & ~DMASK)|(((x) & 0x0F) << 6)|(((x) & 0x30) << 10)|(((x) & 0xC0)<<14)
#if defined(ARDUINO_SAMD_ZERO) || defined(ARDUINO_SAMD_ZERO)   // American ZERO
#define write_8(x) {\
	PORT->Group[0].OUTCLR.reg = DMASK;\
	PORT->Group[0].OUTSET.reg = (((x) & 0x0B) << 6)\
                               |(((x) & (1<<2)) << 12)\
	                           |(((x) & (1<<4)) << 4)\
	                           |(((x) & (1<<5)) << 10)\
	                           |(((x) & 0xC0) << 14);\
                   }
#define read_8()   (((PORT->Group[0].IN.reg >> 6) & 0x0B)\
                   |((PORT->Group[0].IN.reg >> 12) & (1<<2))\
                   |((PORT->Group[0].IN.reg >> 4) &  (1<<4))\
                   |((PORT->Group[0].IN.reg >> 10) & (1<<5))\
                   |((PORT->Group[0].IN.reg >> 14) & 0xC0))
#else   //default to an M0_PRO on v1.6.5 or 1.7.6
#define write_8(x) {\
	PORT->Group[0].OUTCLR.reg = DMASK;\
	PORT->Group[0].OUTSET.reg = (((x) & 0x0F) << 6)\
                               |(((x) & 0x30) << 10)\
                               |(((x) & 0xC0) << 14);\
                   }
#define read_8()   (((PORT->Group[0].IN.reg >> 6) & 0x0F)|((PORT->Group[0].IN.reg >> 10) & 0x30)|((PORT->Group[0].IN.reg >> 14) & 0xC0))
#endif
#define setWriteDir() { PORT->Group[0].DIRSET.reg = DMASK; \
	                  PORT->Group[0].WRCONFIG.reg = (DMASK & 0xFFFF) | (0<<22) | (1<<28) | (1<<30); \
	                  PORT->Group[0].WRCONFIG.reg = (DMASK>>16) | (0<<22) | (1<<28) | (1<<30) | (1<<31); \
                        }
#define setReadDir()  { PORT->Group[0].DIRCLR.reg = DMASK; \
	                  PORT->Group[0].WRCONFIG.reg = (DMASK & 0xFFFF) | (1<<17) | (1<<28) | (1<<30); \
	                  PORT->Group[0].WRCONFIG.reg = (DMASK>>16) | (1<<17) | (1<<28) | (1<<30) | (1<<31); \
                        }
#define write8(x)     { write_8(x); WR_ACTIVE; WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
 // Shield Control macros.
#define PIN_LOW(port, pin)    (port).OUTCLR.reg = (1<<(pin))
#define PIN_HIGH(port, pin)   (port).OUTSET.reg = (1<<(pin))
#define PIN_OUTPUT(port, pin) (port).DIR.reg |= (1<<(pin))

//####################################### DUE ############################
#elif defined(__SAM3X8E__)      //regular UNO shield on DUE
 // configure macros for the control pins
#define RD_PORT PIOA
#define RD_PIN  16
#define WR_PORT PIOA
#define WR_PIN  24
#define CD_PORT PIOA
#define CD_PIN  23
#define CS_PORT PIOA
#define CS_PIN  22
#define RESET_PORT PIOA
#define RESET_PIN  6
 // configure macros for data bus
#define BMASK         (1<<25)
#define CMASK         (0xBF << 21)
#define write_8(x)   {  PIOB->PIO_CODR = BMASK; PIOC->PIO_CODR = CMASK; \
                        PIOB->PIO_SODR = (((x) & (1<<2)) << 23); \
                        PIOC->PIO_SODR = (((x) & (1<<0)) << 22) \
                                       | (((x) & (1<<1)) << 20) \
                                       | (((x) & (1<<3)) << 25) \
                                       | (((x) & (1<<4)) << 22) \
                                       | (((x) & (1<<5)) << 20) \
                                       | (((x) & (1<<6)) << 18) \
                                       | (((x) & (1<<7)) << 16); \
					 }

#define read_8()      ( ((PIOC->PIO_PDSR & (1<<22)) >> 22)\
                      | ((PIOC->PIO_PDSR & (1<<21)) >> 20)\
                      | ((PIOB->PIO_PDSR & (1<<25)) >> 23)\
                      | ((PIOC->PIO_PDSR & (1<<28)) >> 25)\
                      | ((PIOC->PIO_PDSR & (1<<26)) >> 22)\
                      | ((PIOC->PIO_PDSR & (1<<25)) >> 20)\
                      | ((PIOC->PIO_PDSR & (1<<24)) >> 18)\
                      | ((PIOC->PIO_PDSR & (1<<23)) >> 16)\
                      )
#define setWriteDir() { PIOB->PIO_OER = BMASK; PIOC->PIO_OER = CMASK; }
#define setReadDir()  { \
                          PMC->PMC_PCER0 = (1 << ID_PIOB)|(1 << ID_PIOC);\
						  PIOB->PIO_ODR = BMASK; PIOC->PIO_ODR = CMASK;\
						}
#define write8(x)     { write_8(x); WR_ACTIVE2; WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; RD_ACTIVE; dst = read_8(); RD_IDLE; RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
 // Shield Control macros.
#define PIN_LOW(port, pin)    (port)->PIO_CODR = (1<<(pin))
#define PIN_HIGH(port, pin)   (port)->PIO_SODR = (1<<(pin))
#define PIN_OUTPUT(port, pin) (port)->PIO_OER = (1<<(pin))

//################################### LEONARDO ##############################
#elif defined(__AVR_ATmega32U4__)       //regular UNO shield on Leonardo
#define RD_PORT PORTF
#define RD_PIN  7
#define WR_PORT PORTF
#define WR_PIN  6
#define CD_PORT PORTF
#define CD_PIN  5
#define CS_PORT PORTF
#define CS_PIN  4
#define RESET_PORT PORTF
#define RESET_PIN  1

#define BMASK         (3<<4)
#define CMASK         (1<<6)
#define DMASK         ((1<<7)|(1<<4)|(3<<0))
#define EMASK         (1<<6)
static inline                   //hope we use r24
void write_8(uint8_t x)
{
    PORTB &= ~BMASK;
    PORTC &= ~CMASK;
    PORTD &= ~DMASK;
    PORTE &= ~EMASK;
    PORTB |= (((x) & (3 << 0)) << 4);
    PORTD |= (((x) & (1 << 2)) >> 1);
    PORTD |= (((x) & (1 << 3)) >> 3);
    PORTD |= (((x) & (1 << 4)) << 0);
    PORTC |= (((x) & (1 << 5)) << 1);
    PORTD |= (((x) & (1 << 6)) << 1);
    PORTE |= (((x) & (1 << 7)) >> 1);
}

#define read_8()      ( ((PINB & (3<<4)) >> 4)\
| ((PIND & (1<<1)) << 1)\
| ((PIND & (1<<0)) << 3)\
| ((PIND & (1<<4)) >> 0)\
| ((PINC & (1<<6)) >> 1)\
| ((PIND & (1<<7)) >> 1)\
| ((PINE & (1<<6)) << 1)\
)
#define setWriteDir() { DDRB |=  BMASK; DDRC |=  CMASK; DDRD |=  DMASK; DDRE |=  EMASK;  }
#define setReadDir()  { DDRB &= ~BMASK; DDRC &= ~CMASK; DDRD &= ~DMASK; DDRE &= ~EMASK;  }
#define write8(x)     { write_8(x); WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

#define PIN_LOW(p, b)        (p) &= ~(1<<(b))
#define PIN_HIGH(p, b)       (p) |= (1<<(b))
#define PIN_OUTPUT(p, b)     *(&p-1) |= (1<<(b))

//################################### UNO SHIELD on BOBUINO ##############################
#elif defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega644P__) //UNO shield on BOBUINO
#warning regular UNO shield on BOBUINO
#define RD_PORT PORTA
#define RD_PIN  7
#define WR_PORT PORTA
#define WR_PIN  6
#define CD_PORT PORTA
#define CD_PIN  5
#define CS_PORT PORTA
#define CS_PIN  4
#define RESET_PORT PORTA
#define RESET_PIN  3

#define BMASK         0x0F              //
#define DMASK         0x6C              //
#define write_8(x)    { PORTB = (PORTB & ~BMASK) | ((x) >> 4); \
        PORTD = (PORTD & ~DMASK) | ((x) & 0x0C) | (((x) & 0x03) << 5); }
#define read_8()      ( (PINB << 4) | (PIND & 0x0C) | ((PIND & 0x60) >> 5) )
#define setWriteDir() { DDRB |=  BMASK; DDRD |=  DMASK; }
#define setReadDir()  { DDRB &= ~BMASK; DDRD &= ~DMASK; }
#define write8(x)     { write_8(x); WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

#define PIN_LOW(p, b)        (p) &= ~(1<<(b))
#define PIN_HIGH(p, b)       (p) |= (1<<(b))
#define PIN_OUTPUT(p, b)     *(&p-1) |= (1<<(b))

//####################################### TEENSY ############################
#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) // regular UNO shield on a Teensy 3.x
#warning regular UNO shield on a Teensy 3.x

#if defined(__MK20DX128__) || defined(__MK20DX256__) // Teensy3.0 || 3.2 96MHz
#define WRITE_DELAY { WR_ACTIVE2; }
#define READ_DELAY  { RD_ACTIVE8; RD_ACTIVE; }
#elif defined(__MK64FX512__) // Teensy3.5 120MHz thanks to PeteJohno
#define WRITE_DELAY { WR_ACTIVE4; }
#define READ_DELAY  { RD_ACTIVE8; }
#elif defined(__MK66FX1M0__) // Teensy3.6 180MHz untested.   delays can possibly be reduced.
#define WRITE_DELAY { WR_ACTIVE8; }
#define READ_DELAY  { RD_ACTIVE16; }
#else
#error unspecified delays
#endif

#define RD_PORT GPIOD
#define RD_PIN 1
#define WR_PORT GPIOC
#define WR_PIN 0
#define CD_PORT GPIOB
#define CD_PIN 0
#define CS_PORT GPIOB
#define CS_PIN 1
#define RESET_PORT GPIOB
#define RESET_PIN 3

// configure macros for the data pins
#define AMASK ((1<<12)|(1<<13))
#define CMASK ((1<<3))
#define DMASK ((1<<0)|(1<<2)|(1<<3)|(1<<4)|(1<<7))

#define write_8(d) { \
        GPIOA_PCOR = AMASK; GPIOC_PCOR = CMASK; GPIOD_PCOR = DMASK; \
        GPIOA_PSOR = (((d) & (1 << 3)) << 9) \
                     | (((d) & (1 << 4)) << 9); \
        GPIOC_PSOR = (((d) & (1 << 1)) << 2); \
        GPIOD_PSOR = (((d) & (1 << 0)) << 3) \
                     | (((d) & (1 << 2)) >> 2) \
                     | (((d) & (1 << 5)) << 2) \
                     | (((d) & (1 << 6)) >> 2) \
                     | (((d) & (1 << 7)) >> 5); \
        }
#define read_8() ((((GPIOD_PDIR & (1<<3)) >> 3) \
                   | ((GPIOC_PDIR & (1 << 3)) >> 2) \
                   | ((GPIOD_PDIR & (1 << 0)) << 2) \
                   | ((GPIOA_PDIR & (1 << 12)) >> 9) \
                   | ((GPIOA_PDIR & (1 << 13)) >> 9) \
                   | ((GPIOD_PDIR & (1 << 7)) >> 2) \
                   | ((GPIOD_PDIR & (1 << 4)) << 2) \
                   | ((GPIOD_PDIR & (1 << 2)) << 5)))
#define setWriteDir() {GPIOA_PDDR |= AMASK;GPIOC_PDDR |= CMASK;GPIOD_PDDR |= DMASK; }
#define setReadDir() {GPIOA_PDDR &= ~AMASK;GPIOC_PDDR &= ~CMASK;GPIOD_PDDR &= ~DMASK; }
#define write8(x) { write_8(x); WRITE_DELAY; WR_STROBE; } //PJ adjusted
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst) { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE; } //PJ adjusted
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
//#define GPIO_INIT() {SIM_SCGC5 |= 0x3E00;}  //PORTA-PORTE
#define GPIO_INIT() {for (int i = 2; i <= 9; i++) pinMode(i, OUTPUT); for (int i = A0; i <= A4; i++) pinMode(i, OUTPUT);}

#define PASTE(x, y) x ## y

#define PIN_LOW(port, pin) PASTE(port, _PCOR) = (1<<(pin))
#define PIN_HIGH(port, pin) PASTE(port, _PSOR) = (1<<(pin))
#define PIN_OUTPUT(port, pin) PASTE(port, _PDDR) |= (1<<(pin))

//####################################### STM32 ############################
// NUCLEO:   ARDUINO_NUCLEO_xxxx from ST Core or ARDUINO_STM_NUCLEO_F103RB from MapleCore
// BLUEPILL: ARDUINO_NUCLEO_F103C8 / ARDUINO_BLUEPILL_F103C8 from ST Core or ARDUINO_GENERIC_STM32F103C from MapleCore
// MAPLE_REV3: n/a from ST Core or ARDUINO_MAPLE_REV3 from MapleCore
// ST Core:   ARDUINO_ARCH_STM32
// MapleCore: __STM32F1__
#elif defined(__STM32F1__) || defined(ARDUINO_ARCH_STM32)   //MapleCore or ST Core
#define IS_NUCLEO64 ( defined(ARDUINO_STM_NUCLEO_F103RB) \
                   || defined(ARDUINO_NUCLEO_F030R8) || defined(ARDUINO_NUCLEO_F091RC) \
                   || defined(ARDUINO_NUCLEO_F103RB) || defined(ARDUINO_NUCLEO_F303RE) \
                   || defined(ARDUINO_NUCLEO_F401RE) || defined(ARDUINO_NUCLEO_F411RE) \
                   || defined(ARDUINO_NUCLEO_F446RE) || defined(ARDUINO_NUCLEO_L053R8) \
                   || defined(ARDUINO_NUCLEO_L152RE) || defined(ARDUINO_NUCLEO_L476RG) \
                    )
// F1xx, F4xx, L4xx have different registers and styles.  General Macros
#if defined(__STM32F1__)   //weird Maple Core
#define REGS(x) regs->x
#else                      //regular ST Core
#define REGS(x) x
#endif
#define PIN_HIGH(port, pin)   (port)-> REGS(BSRR) = (1<<(pin))
#define PIN_LOW(port, pin)    (port)-> REGS(BSRR) = (1<<((pin)+16))
#define PIN_MODE2(reg, pin, mode) reg=(reg&~(0x3<<((pin)<<1)))|(mode<<((pin)<<1))
#define GROUP_MODE(port, reg, mask, val)  {port->REGS(reg) = (port->REGS(reg) & ~(mask)) | ((mask)&(val)); }

// Family specific Macros.  F103 needs ST and Maple compatibility
// note that ILI9320 class of controller has much slower Read cycles
#if 0
#elif defined(__STM32F1__) || defined(ARDUINO_NUCLEO_F103C8) || defined(ARDUINO_BLUEPILL_F103C8) || defined(ARDUINO_NUCLEO_F103RB)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#if defined(__STM32F1__)  //MapleCore crts.o does RCC.  not understand regular syntax anyway
#define GPIO_INIT()      
#else
#define GPIO_INIT()   { RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_AFIOEN; \
        AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1;}
#endif
#define GP_OUT(port, reg, mask)           GROUP_MODE(port, reg, mask, 0x33333333)
#define GP_INP(port, reg, mask)           GROUP_MODE(port, reg, mask, 0x44444444)
#define PIN_OUTPUT(port, pin) {\
        if (pin < 8) {GP_OUT(port, CRL, 0xF<<((pin)<<2));} \
        else {GP_OUT(port, CRH, 0xF<<((pin&7)<<2));} \
    }
#define PIN_INPUT(port, pin) { \
        if (pin < 8) { GP_INP(port, CRL, 0xF<<((pin)<<2)); } \
        else { GP_INP(port, CRH, 0xF<<((pin&7)<<2)); } \
    }

// should be easy to add F030, F091, F303, L053, ...
#elif defined(STM32F030x8)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32F091xC)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32F303xE)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; \
                      /* AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1; */ }

#elif defined(STM32F401xE)
#define WRITE_DELAY { WR_ACTIVE2; }
#define READ_DELAY  { RD_ACTIVE4; }
#define GPIO_INIT()   { RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32F411xE)
#define WRITE_DELAY { WR_ACTIVE2; WR_ACTIVE; }
#define READ_DELAY  { RD_ACTIVE4; RD_ACTIVE2; }
#define GPIO_INIT()   { RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32F446xx)
#define WRITE_DELAY { WR_ACTIVE8; }
#define READ_DELAY  { RD_ACTIVE16;}
#define GPIO_INIT()   { RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32L053xx)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#define GPIO_INIT()   { RCC->IOPENR |= RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32L152xE)
#define WRITE_DELAY { }
#define READ_DELAY  { RD_ACTIVE; }
#define GPIO_INIT()   { RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | RCC_AHBENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#elif defined(STM32L476xx)
#define WRITE_DELAY { WR_ACTIVE2; }
#define READ_DELAY  { RD_ACTIVE4; RD_ACTIVE; }
#define GPIO_INIT()   { RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_GPIOCEN; }
#define PIN_OUTPUT(port, pin) PIN_MODE2((port)->MODER, pin, 0x1)

#else
#error unsupported STM32
#endif

#if 0
#elif defined(ARDUINO_GENERIC_STM32F103C) || defined(ARDUINO_NUCLEO_F103C8) || defined(ARDUINO_BLUEPILL_F103C8)
#warning Uno Shield on BLUEPILL
#define RD_PORT GPIOB
//#define RD_PIN  5
#define RD_PIN  0  //hardware mod to Adapter.  Allows use of PB5 for SD Card
#define WR_PORT GPIOB
#define WR_PIN  6
#define CD_PORT GPIOB
#define CD_PIN  7
#define CS_PORT GPIOB
#define CS_PIN  8
#define RESET_PORT GPIOB
#define RESET_PIN  9

// configure macros for the data pins
#define write_8(d)    { GPIOA->REGS(BSRR) = 0x00FF << 16; GPIOA->REGS(BSRR) = (d) & 0xFF; }
#define read_8()      (GPIOA->REGS(IDR) & 0xFF)
//                                         PA7 ..PA0
#define setWriteDir() {GP_OUT(GPIOA, CRL, 0xFFFFFFFF); }
#define setReadDir()  {GP_INP(GPIOA, CRL, 0xFFFFFFFF); }

#elif IS_NUCLEO64 // Uno Shield on NUCLEO
#warning Uno Shield on NUCLEO
#define RD_PORT GPIOA
#define RD_PIN  0
#define WR_PORT GPIOA
#define WR_PIN  1
#define CD_PORT GPIOA
#define CD_PIN  4
#define CS_PORT GPIOB
#define CS_PIN  0
#define RESET_PORT GPIOC
#define RESET_PIN  1

// configure macros for the data pins
#define write_8(d) { \
        GPIOA->REGS(BSRR) = 0x0700 << 16; \
        GPIOB->REGS(BSRR) = 0x0438 << 16; \
        GPIOC->REGS(BSRR) = 0x0080 << 16; \
        GPIOA->REGS(BSRR) = (  ((d) & (1<<0)) << 9) \
                            | (((d) & (1<<2)) << 8) \
                            | (((d) & (1<<7)) << 1); \
        GPIOB->REGS(BSRR) = (  ((d) & (1<<3)) << 0) \
                            | (((d) & (1<<4)) << 1) \
                            | (((d) & (1<<5)) >> 1) \
                            | (((d) & (1<<6)) << 4); \
        GPIOC->REGS(BSRR) = (  ((d) & (1<<1)) << 6); \
    }

#define read_8() (       (  (  (GPIOA->REGS(IDR) & (1<<9)) >> 9) \
                            | ((GPIOC->REGS(IDR) & (1<<7)) >> 6) \
                            | ((GPIOA->REGS(IDR) & (1<<10)) >> 8) \
                            | ((GPIOB->REGS(IDR) & (1<<3)) >> 0) \
                            | ((GPIOB->REGS(IDR) & (1<<5)) >> 1) \
                            | ((GPIOB->REGS(IDR) & (1<<4)) << 1) \
                            | ((GPIOB->REGS(IDR) & (1<<10)) >> 4) \
                            | ((GPIOA->REGS(IDR) & (1<<8))  >> 1)))


#if defined(ARDUINO_NUCLEO_F103RB) || defined(ARDUINO_STM_NUCLEO_F103RB) //F103 has unusual GPIO modes
//                                 PA10,PA9,PA8                       PB10                   PB5,PB4,PB3                             PC7
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOB, CRH, 0xF00); GP_OUT(GPIOB, CRL, 0xFFF000); GP_OUT(GPIOC, CRL, 0xF0000000); }
#define setReadDir()  {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOB, CRH, 0xF00); GP_INP(GPIOB, CRL, 0xFFF000); GP_INP(GPIOC, CRL, 0xF0000000); }
#else      //F0xx, F3xx, F4xx, L0xx, L1xx, L4xx use MODER
//                                   PA10,PA9,PA8           PB10,PB5,PB4,PB3                      PC7
#define setWriteDir() { setReadDir(); \
                        GPIOA->MODER |=  0x150000; GPIOB->MODER |=  0x100540; GPIOC->MODER |=  0x4000; }
#define setReadDir()  { GPIOA->MODER &= ~0x3F0000; GPIOB->MODER &= ~0x300FC0; GPIOC->MODER &= ~0xC000; }
#endif

#elif defined(ARDUINO_MAPLE_REV3) // Uno Shield on MAPLE_REV3 board
#warning Uno Shield on MAPLE_REV3 board
#define RD_PORT GPIOC
#define RD_PIN  0
#define WR_PORT GPIOC
#define WR_PIN  1
#define CD_PORT GPIOC
#define CD_PIN  2
#define CS_PORT GPIOC
#define CS_PIN  3
#define RESET_PORT GPIOC
#define RESET_PIN  4

// configure macros for the data pins
#define write_8(d) { \
        GPIOA->REGS(BSRR) = 0x0703 << 16; \
        GPIOB->REGS(BSRR) = 0x00E0 << 16; \
        GPIOA->REGS(BSRR) = (  ((d) & (1<<0)) << 10) \
                            | (((d) & (1<<2)) >> 2) \
                            | (((d) & (1<<3)) >> 2) \
                            | (((d) & (1<<6)) << 2) \
                            | (((d) & (1<<7)) << 2); \
        GPIOB->REGS(BSRR) = (  ((d) & (1<<1)) << 6) \
                            | (((d) & (1<<4)) << 1) \
                            | (((d) & (1<<5)) << 1); \
    }

#define read_8()  (     (   (  (GPIOA->REGS(IDR) & (1<<10)) >> 10) \
                            | ((GPIOB->REGS(IDR) & (1<<7)) >> 6) \
                            | ((GPIOA->REGS(IDR) & (1<<0)) << 2) \
                            | ((GPIOA->REGS(IDR) & (1<<1)) << 2) \
                            | ((GPIOB->REGS(IDR) & (1<<5)) >> 1) \
                            | ((GPIOB->REGS(IDR) & (1<<6)) >> 1) \
                            | ((GPIOA->REGS(IDR) & (1<<8)) >> 2) \
                            | ((GPIOA->REGS(IDR) & (1<<9)) >> 2)))

//                                 PA10,PA9,PA8                   PA1,PA0                     PB7,PB6,PB5
#define setWriteDir() {GP_OUT(GPIOA, CRH, 0xFFF); GP_OUT(GPIOA, CRL, 0xFF); GP_OUT(GPIOB, CRL, 0xFFF00000); }
#define setReadDir()  {GP_INP(GPIOA, CRH, 0xFFF); GP_INP(GPIOA, CRL, 0xFF); GP_INP(GPIOB, CRL, 0xFFF00000); }

#else
#error REGS group
#endif

#define write8(x)     { write_8(x); WRITE_DELAY; WR_STROBE; WR_IDLE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE; RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

//################################### ESP32 ##############################
#elif defined(ESP32)       //regular UNO shield on TTGO D1 R32 (ESP32)
#define LCD_RD  2  //LED
#define LCD_WR  4
#define LCD_RS 15  //hard-wired to A2 (GPIO35) 
#define LCD_CS 33  //hard-wired to A3 (GPIO34)
#define LCD_RST 32 //hard-wired to A4 (GPIO36)

#define LCD_D0 12
#define LCD_D1 13
#define LCD_D2 26
#define LCD_D3 25
#define LCD_D4 17
#define LCD_D5 16
#define LCD_D6 27
#define LCD_D7 14

#define RD_PORT GPIO.out
#define RD_PIN  LCD_RD
#define WR_PORT GPIO.out
#define WR_PIN  LCD_WR
#define CD_PORT GPIO.out
#define CD_PIN  LCD_RS
#define CS_PORT GPIO.out1.val
#define CS_PIN  LCD_CS
#define RESET_PORT GPIO.out1.val
#define RESET_PIN  LCD_RST

static inline uint32_t map_8(uint32_t d)
{
    return (
               0
               | ((d & (1 << 0)) << (LCD_D0 - 0))
               | ((d & (1 << 1)) << (LCD_D1 - 1))
               | ((d & (1 << 2)) << (LCD_D2 - 2))
               | ((d & (1 << 3)) << (LCD_D3 - 3))
               | ((d & (1 << 4)) << (LCD_D4 - 4))
               | ((d & (1 << 5)) << (LCD_D5 - 5))
               | ((d & (1 << 6)) << (LCD_D6 - 6))
               | ((d & (1 << 7)) << (LCD_D7 - 7))
           );
}

static inline uint8_t map_32(uint32_t d)
{
    return (
               0
               | ((d & (1 << LCD_D0)) >> (LCD_D0 - 0))
               | ((d & (1 << LCD_D1)) >> (LCD_D1 - 1))
               | ((d & (1 << LCD_D2)) >> (LCD_D2 - 2))
               | ((d & (1 << LCD_D3)) >> (LCD_D3 - 3))
               | ((d & (1 << LCD_D4)) >> (LCD_D4 - 4))
               | ((d & (1 << LCD_D5)) >> (LCD_D5 - 5))
               | ((d & (1 << LCD_D6)) >> (LCD_D6 - 6))
               | ((d & (1 << LCD_D7)) >> (LCD_D7 - 7))
           );
}

static inline void write_8(uint16_t data)
{
    GPIO.out_w1tc = map_8(0xFF);  //could define once as DMASK
    GPIO.out_w1ts = map_8(data);
}

static inline uint8_t read_8()
{
    return map_32(GPIO.in);
}
static void setWriteDir()
{
    pinMode(LCD_D0, OUTPUT);
    pinMode(LCD_D1, OUTPUT);
    pinMode(LCD_D2, OUTPUT);
    pinMode(LCD_D3, OUTPUT);
    pinMode(LCD_D4, OUTPUT);
    pinMode(LCD_D5, OUTPUT);
    pinMode(LCD_D6, OUTPUT);
    pinMode(LCD_D7, OUTPUT);
}

static void setReadDir()
{
    pinMode(LCD_D0, INPUT);
    pinMode(LCD_D1, INPUT);
    pinMode(LCD_D2, INPUT);
    pinMode(LCD_D3, INPUT);
    pinMode(LCD_D4, INPUT);
    pinMode(LCD_D5, INPUT);
    pinMode(LCD_D6, INPUT);
    pinMode(LCD_D7, INPUT);
}

#define WRITE_DELAY { }
#define READ_DELAY  { }

#define write8(x)     { write_8(x); WRITE_DELAY; WR_STROBE; }
#define write16(x)    { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst)   { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE; }
#define READ_16(dst)  { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }

#define PIN_LOW(p, b)        (digitalWrite(b, LOW))
#define PIN_HIGH(p, b)       (digitalWrite(b, HIGH))
#define PIN_OUTPUT(p, b)     (pinMode(b, OUTPUT))

#else
#error MCU unsupported
#endif                          // regular UNO shields on Arduino boards

#endif                          //!defined(USE_SPECIAL) || defined (USE_SPECIAL_FAIL)

#if defined(__AVR_ATmega4809__) //HARDCODED TO ATMEGA4809
    #define RD_ACTIVE  PIN_LOW(VPORTD_DIR, 0x00)//PD0
    #define RD_IDLE    PIN_HIGH(VPORTD_DIR, 0x00)
    #define RD_OUTPUT  PIN_OUTPUT(VPORTD_DIR, 0x00)

    #define WR_ACTIVE  PIN_LOW(VPORTD_DIR, 0x01)//PD1
    #define WR_IDLE    PIN_HIGH(VPORTD_DIR, 0x01)
    #define WR_OUTPUT  PIN_OUTPUT(VPORTD_DIR, 0x01)

    #define CD_COMMAND PIN_LOW(VPORTD_DIR, 0x01)//PD2
    #define CD_DATA    PIN_HIGH(VPORTD_DIR, 0x01)
    #define CD_OUTPUT  PIN_OUTPUT(VPORTD_DIR, 0x01)

    #define CS_ACTIVE  PIN_LOW(VPORTD_DIR, 0x01)//PD3
    #define CS_IDLE    PIN_HIGH(VPORTD_DIR, 0x01)
    #define CS_OUTPUT  PIN_OUTPUT(VPORTD_DIR, 0x01)

    #define RESET_ACTIVE  PIN_LOW(VPORTD_DIR, 0x01)//PD4 
    #define RESET_IDLE    PIN_HIGH(VPORTD_DIR, 0x01)
    #define RESET_OUTPUT  PIN_OUTPUT(VPORTD_DIR, 0x01)

#else

    #define RD_ACTIVE  PIN_LOW(RD_PORT, RD_PIN)
    #define RD_IDLE    PIN_HIGH(RD_PORT, RD_PIN)
    #define RD_OUTPUT  PIN_OUTPUT(RD_PORT, RD_PIN)

    #define WR_ACTIVE  PIN_LOW(WR_PORT, WR_PIN)
    #define WR_IDLE    PIN_HIGH(WR_PORT, WR_PIN)
    #define WR_OUTPUT  PIN_OUTPUT(WR_PORT, WR_PIN)

    #define CD_COMMAND PIN_LOW(CD_PORT, CD_PIN)
    #define CD_DATA    PIN_HIGH(CD_PORT, CD_PIN)
    #define CD_OUTPUT  PIN_OUTPUT(CD_PORT, CD_PIN)

    #define CS_ACTIVE  PIN_LOW(CS_PORT, CS_PIN)
    #define CS_IDLE    PIN_HIGH(CS_PORT, CS_PIN)
    #define CS_OUTPUT  PIN_OUTPUT(CS_PORT, CS_PIN)

    #define RESET_ACTIVE  PIN_LOW(RESET_PORT, RESET_PIN)
    #define RESET_IDLE    PIN_HIGH(RESET_PORT, RESET_PIN)
    #define RESET_OUTPUT  PIN_OUTPUT(RESET_PORT, RESET_PIN)

#endif

 // General macros.   IOCLR registers are 1 cycle when optimised.
#define WR_STROBE { WR_ACTIVE; WR_IDLE; }       //PWLW=TWRL=50ns
#define RD_STROBE RD_IDLE, RD_ACTIVE, RD_ACTIVE, RD_ACTIVE      //PWLR=TRDL=150ns, tDDR=100ns

#if !defined(GPIO_INIT)
#define GPIO_INIT()
#endif
#define CTL_INIT()   { GPIO_INIT(); RD_OUTPUT; WR_OUTPUT; CD_OUTPUT; CS_OUTPUT; RESET_OUTPUT; }
#define WriteCmd(x)  { CD_COMMAND; write16(x); CD_DATA; }
#define WriteData(x) { write16(x); }

This is the pin mapping that I created between the Shield, Nano Every, and UNO:

image
image685×688 16.1 KB

Is it possible to get the screen to interface with the Nano Every? Or am I pursuing a hopeless endeavor?

All the best,
Tylon

2

First off. WHY?

You have a regular Blue Mcufriend-style Shield.
You just connect each Nano-Every pin exactly the same as a Nano-328P.

Personally, I use a Nano-to-Uno adapter. i.e. I plug the Nano into the Nano socket and the Shield into the Arduino header sockets.
This applies for regular Nano-328P, Nano-Every, Nano-BLE, ... or any other Nano variant. All the signals are known. No trailing wires.

The library should work straight out of the box.

If you want to map your EVERY in a special way, write a custom SPECIAL block and add it to your utility/mcufriend_special.h file.

As far as I can see from your mapping table, you have just swapped LCD_D0 from D8 to D10. And rearranged all of the control signals.

I like the way that you have added binary comment values to the xMASK defines. Your write_8() macro is plain wrong. Your read_8() macro is horrible.

Ah-ha. I have used inline asm (aka gobbledygook) for the write_8() macro. If you want it to go slower, I will post the regular C shift and mask version.

From mcufriend_how_to.txt
18. Please run LCD_ID_readreg.ino to verify your non-standard wiring. Paste the defines to a Forum message.

I will write the SPECIAL for you if the wiring is verified first.

David.

3

Thank you very much for replying. The LCD_ID_readreg for my initial method was:

#define LCD_RST A6
#define LCD_CS A0
#define LCD_RS A1
#define LCD_WR A2
#define LCD_RD A3

#define LCD_D0 10
//Everything else is the same

03:42:58.201 -> Read Registers on MCUFRIEND UNO shield
03:42:58.248 -> controllers either read as single 16-bit
03:42:58.297 -> e.g. the ID is at readReg(0)
03:42:58.343 -> or as a sequence of 8-bit values
03:42:58.390 -> in special locations (first is dummy)
03:42:58.390 -> 
03:42:58.390 -> reg(0x0000) 00 00	ID: ILI9320, ILI9325, ILI9335, ...
03:42:58.484 -> reg(0x0004) 00 54 80 66	Manufacturer ID
03:42:58.531 -> reg(0x0009) 00 00 61 00 00	Status Register
03:42:58.578 -> reg(0x000A) 00 08	Get Power Mode
03:42:58.578 -> reg(0x000C) 00 66	Get Pixel Format
03:42:58.625 -> reg(0x0061) 00 00	RDID1 HX8347-G
03:42:58.672 -> reg(0x0062) 00 00	RDID2 HX8347-G
03:42:58.718 -> reg(0x0063) 00 00	RDID3 HX8347-G
03:42:58.718 -> reg(0x0064) 00 00	RDID1 HX8347-A
03:42:58.765 -> reg(0x0065) 00 00	RDID2 HX8347-A
03:42:58.812 -> reg(0x0066) 00 00	RDID3 HX8347-A
03:42:58.859 -> reg(0x0067) 00 00	RDID Himax HX8347-A
03:42:58.859 -> reg(0x0070) 00 00	Panel Himax HX8347-A
03:42:58.906 -> reg(0x00A1) 00 93 30 93 30	RD_DDB SSD1963
03:42:58.953 -> reg(0x00B0) 00 00	RGB Interface Signal Control
03:42:59.009 -> reg(0x00B4) 00 00	Inversion Control
03:42:59.056 -> reg(0x00B6) 00 02 02 3B 3B	Display Control
03:42:59.103 -> reg(0x00B7) 00 06	Entry Mode Set
03:42:59.150 -> reg(0x00BF) 00 00 00 00 00 00	ILI9481, HX8357-B
03:42:59.197 -> reg(0x00C0) 00 0E 0E 0E 0E 0E 0E 0E 0E	Panel Control
03:42:59.234 -> reg(0x00C8) 00 00 00 00 00 00 00 00 00 00 00 00 00	GAMMA
03:42:59.329 -> reg(0x00CC) 00 04	Panel Control
03:42:59.329 -> reg(0x00D0) 00 00 00	Power Control
03:42:59.376 -> reg(0x00D2) 00 00 00 00 00	NVM Read
03:42:59.424 -> reg(0x00D3) 00 00 94 86	ILI9341, ILI9488
03:42:59.471 -> reg(0x00D4) 00 00 00 00	Novatek ID
03:42:59.518 -> reg(0x00DA) 00 54	RDID1
03:42:59.518 -> reg(0x00DB) 00 80	RDID2
03:42:59.564 -> reg(0x00DC) 00 66	RDID3
03:42:59.564 -> reg(0x00E0) 00 0D 0D 31 03 07 06 3A B1 7D 0F 17 07 3D 3F 04	GAMMA-P
03:42:59.658 -> reg(0x00E1) 00 05 0C 1A 09 14 0B 36 53 3D 0D 1F 0E 0E 23 0E	GAMMA-N
03:42:59.705 -> reg(0x00EF) 00 80 00 10 60 40	ILI9327
03:42:59.752 -> reg(0x00F2) 00 18 A3 12 02 B2 12 FF 10 00 00 00	Adjust Control 2
03:42:59.846 -> reg(0x00F6) 00 54 80 66	Interface Control

I reconnected my shield to the Nano Every with Female to Female wires since I do not have an adapter. I connected it as if it was a UNO without its headers. And the LCD would just appear white during the graphictest_kbv. Here is the LCD_ID_readreg:

#define LCD_RST A4
#define LCD_CS A3
#define LCD_RS A2
#define LCD_WR A1
#define LCD_RD A0

#define LCD_D0 8
//Everything else is the same

03:53:46.503 -> Read Registers on MCUFRIEND UNO shield
03:53:46.503 -> controllers either read as single 16-bit
03:53:46.550 -> e.g. the ID is at readReg(0)
03:53:46.597 -> or as a sequence of 8-bit values
03:53:46.643 -> in special locations (first is dummy)
03:53:46.690 -> 
03:53:46.690 -> reg(0x0000) 00 00	ID: ILI9320, ILI9325, ILI9335, ...
03:53:46.737 -> reg(0x0004) 00 54 80 66	Manufacturer ID
03:53:46.784 -> reg(0x0009) 00 00 61 00 00	Status Register
03:53:46.831 -> reg(0x000A) 00 08	Get Power Mode
03:53:46.878 -> reg(0x000C) 00 66	Get Pixel Format
03:53:46.878 -> reg(0x0061) 00 00	RDID1 HX8347-G
03:53:46.915 -> reg(0x0062) 00 00	RDID2 HX8347-G
03:53:46.952 -> reg(0x0063) 00 00	RDID3 HX8347-G
03:53:46.999 -> reg(0x0064) 00 00	RDID1 HX8347-A
03:53:47.046 -> reg(0x0065) 00 00	RDID2 HX8347-A
03:53:47.093 -> reg(0x0066) 00 00	RDID3 HX8347-A
03:53:47.093 -> reg(0x0067) 00 00	RDID Himax HX8347-A
03:53:47.146 -> reg(0x0070) 00 00	Panel Himax HX8347-A
03:53:47.193 -> reg(0x00A1) 00 93 30 93 30	RD_DDB SSD1963
03:53:47.240 -> reg(0x00B0) 00 00	RGB Interface Signal Control
03:53:47.287 -> reg(0x00B4) 00 00	Inversion Control
03:53:47.335 -> reg(0x00B6) 00 02 02 3B 3B	Display Control
03:53:47.383 -> reg(0x00B7) 00 06	Entry Mode Set
03:53:47.383 -> reg(0x00BF) 00 00 00 00 00 00	ILI9481, HX8357-B
03:53:47.477 -> reg(0x00C0) 00 0E 0E 0E 0E 0E 0E 0E 0E	Panel Control
03:53:47.514 -> reg(0x00C8) 00 00 00 00 00 00 00 00 00 00 00 00 00	GAMMA
03:53:47.561 -> reg(0x00CC) 00 04	Panel Control
03:53:47.608 -> reg(0x00D0) 00 00 00	Power Control
03:53:47.655 -> reg(0x00D2) 00 00 00 00 00	NVM Read
03:53:47.702 -> reg(0x00D3) 00 00 94 86	ILI9341, ILI9488
03:53:47.748 -> reg(0x00D4) 00 00 00 00	Novatek ID
03:53:47.748 -> reg(0x00DA) 00 54	RDID1
03:53:47.795 -> reg(0x00DB) 00 80	RDID2
03:53:47.795 -> reg(0x00DC) 00 66	RDID3
03:53:47.842 -> reg(0x00E0) 00 0D 09 31 03 13 06 38 A9 7F 0F 1F 03 3D 2F 04	GAMMA-P
03:53:47.936 -> reg(0x00E1) 00 00 2E 1B 08 16 0B 36 93 38 0D 1D 0E 06 2F 0E	GAMMA-N
03:53:47.983 -> reg(0x00EF) 00 80 00 10 60 40	ILI9327
03:53:48.030 -> reg(0x00F2) 00 18 A3 12 02 B2 12 FF 10 00 00 00	Adjust Control 2
03:53:48.076 -> reg(0x00F6) 00 54 80 66	Interface Control

If I misunderstood your post, I appologize. What I understood about

is that I need to connect it like it was an UNO since both the Nano-328P and UNO have the same microcontroller.

I really appreciate your offer to make a SPECIAL! But I think it would be best if I did not do what I did. I'm still having the white screen issue now that I configured it as if it was a UNO pinout. Is there something I can provide or change?

4

LCD_ID_readreg is working correctly for both wiring schemes.

Re-install MCUFRIEND_kbv library to ensure you have a "clean" mcufriend_shield.h

Everything should work with the regular Nano wiring.

Oh. If you copy-paste from the Serial Terminal, please disable the timestamps. They are HORRIBLE.

David.

5

Thank you so much! I guess when I initially followed a tutorial online, I had used a deprecated version and it gave me a compile error. Sorry if I had made your eyes bleed from my edited code :sweat_smile:

By chance, would this also work for the Arduino Nano 33IOT? Since it only revolves around 3.3V, would that be a concern?

Cordially,
Tylon

6

It looks as if the v2.9.9Release does not support BLE. But the current Beta does e.g.


//################################## NANO33 BLE ############################
#elif defined(ARDUINO_ARDUINO_NANO33BLE)
#warning regular UNO shield on a Nano33 BLE

//LCD pins  |D7   |D6   |D5   |D4   |D3   |D2   |D1   |D0   | |RD  |WR  |RS   |CS   |RST  |
//BLE pin   |P0.23|P1.14|P1.13|P1.15|P1.12|P1.11|P0.27|P0.21| |P0.4|P0.5|P0.30|P0.29|P0.31|
//NANO pins |7    |6    |5    |4    |3    |2    |9    |8    | |A0  |A1  |A2   |A3   |A4   |

The IOT33 seems to use a SAMD21 MCU. I don't have an IOT33.
If you possess one and want to do the testing, I will add support.

It would be much easier on GitHub. Especially if you have a GitHub account and know how to use it.

David.

1 Like
7

Hello David,

Good news, I used my IOT33 and it worked perfectly! I can confidently say that the Arduino Nano 33IOT when wired similarly to the UNO, works exactly as intended.

The only difference is that the 5V pin needed a source of 5V!
In my testing, I have found my LCD Shield has a linear regulator AMS1117 that drops the intended voltage from 5V to 3.3V. However, Nano 33IOT already outputs 3.3V! So the resulting voltage was around 2.5V, which was too low to power the shield.

I fixed this issue by connecting my VIN port to the Shield's 5V pin, which conveniently provides ~5V when in USB mode.

I also notice that the 3.3V pin does not seem to be connected to anywhere. At least in my version of the Blue MCUFriend board. So if you wanted to short the Linear Regulator and use the 3.3V supply, you'll also have to bridge the 3.3V pin and the 5V pin.

Here is the ID_readreg and a picture as proof:

Read Registers on MCUFRIEND UNO shield
controllers either read as single 16-bit
e.g. the ID is at readReg(0)
or as a sequence of 8-bit values
in special locations (first is dummy)

reg(0x0000) 00 00	ID: ILI9320, ILI9325, ILI9335, ...
reg(0x0004) 00 54 80 66	Manufacturer ID
reg(0x0009) 00 00 61 00 00	Status Register
reg(0x000A) 00 08	Get Power Mode
reg(0x000C) 00 66	Get Pixel Format
reg(0x0061) 00 00	RDID1 HX8347-G
reg(0x0062) 00 00	RDID2 HX8347-G
reg(0x0063) 00 00	RDID3 HX8347-G
reg(0x0064) 00 00	RDID1 HX8347-A
reg(0x0065) 00 00	RDID2 HX8347-A
reg(0x0066) 00 00	RDID3 HX8347-A
reg(0x0067) 00 00	RDID Himax HX8347-A
reg(0x0070) 00 00	Panel Himax HX8347-A
reg(0x00A1) 00 93 30 93 30	RD_DDB SSD1963
reg(0x00B0) 00 00	RGB Interface Signal Control
reg(0x00B4) 00 00	Inversion Control
reg(0x00B6) 00 02 02 3B 3B	Display Control
reg(0x00B7) 00 06	Entry Mode Set
reg(0x00BF) 00 00 00 00 00 00	ILI9481, HX8357-B
reg(0x00C0) 00 0E 0E 0E 0E 0E 0E 0E 0E	Panel Control
reg(0x00C8) 00 00 00 00 00 00 00 00 00 00 00 00 00	GAMMA
reg(0x00CC) 00 04	Panel Control
reg(0x00D0) 00 00 00	Power Control
reg(0x00D2) 00 00 00 00 00	NVM Read
reg(0x00D3) 00 00 94 86	ILI9341, ILI9488
reg(0x00D4) 00 00 00 00	Novatek ID
reg(0x00DA) 00 54	RDID1
reg(0x00DB) 00 80	RDID2
reg(0x00DC) 00 66	RDID3
reg(0x00E0) 00 0F 21 1C 0B 0E 08 49 98 38 09 11 03 14 10 00	GAMMA-P
reg(0x00E1) 00 0F 2F 2B 0C 0E 06 47 76 37 07 11 04 23 1E 00	GAMMA-N
reg(0x00EF) 00 80 00 10 60 40	ILI9327
reg(0x00F2) 00 18 A3 12 02 B2 12 FF 10 00 00 00	Adjust Control 2
reg(0x00F6) 00 54 80 66	Interface Control

No SD
No SD1920×1440 221 KB

With SD
With SD1920×1440 280 KB

GitHub would definitely make things easier, but there isn't anything I really needed to change.
The code from "mcufriend_special_3.h" for the 33IOT is perfect and worked seamlessly when I pasted it into "mcufriend_shield.h". (I initially imported it, but it gave me compile-time errors, so I pasted it instead)

I hope this helps you and anyone that is looking to use an Arduino Nano 33IOT / Nano-Every!

All the best,
Tylon

8

Ah-ha. I never thought of looking through the "extra/unused" files.
I just wrote a fresh version. Which incidentally is almost exactly the same as the one you found.
It was a worthwhile exercise. I discovered a typo in my Zero/M0 mapping description. The code was good. My comments were bad.

From memory, your Blue Shield powers its AMS1117 from the 5V pin. And the 3.3V is unused. You just need to connect to the 5V pin from the IOT33. The Shield looks after the correct GPIO logic levels.

If you can confirm that everything works ok, I will add it to the Beta mcufriend_shield.h because it is using the "official" shield wiring.
The DELAY macros are very conservative.

David.

9

Thanks again, David!

The 33IOT 5V pin is disabled by default and you'll have to manually solder the pads. It will continue to output 3.3V unless it is shorted. However, the 5V can damage the hardware on the board.

But yes, once the 5V is connected to 5V of the shield, everything begins operating as if I was using an Arduino Uno.

All the more best,
Tylon

10

Yes, you have to enable the 5V pin on the 33 BLE too.

Just remember that the 5V pin is for powering external boards. Do not connect it to any GPIO pins.

11

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