[Solved] Dynamixel AX-12 protocol / library question

Hello,

I am thinking about moving to dynamixel digital servos for my robot project. But befor doing this, I have some concerns about the AX-12 half duplex protocol:

I wonder, how fast after sending the last byte of a packet, the send pin must be powered off, in order to not disturbe the half duplex receive signal.

(This problem exists in both AX-12 libraries, independendly, if there is some extra HW or not. Either the arduino TX pin must be switched off, or the extra HW must be told to switch that line off.)

In the ax12 library from Pablo Gindel, refered by
http://www.pablogindel.com/informacion/the-arduinodynamixel-resource-page/
there is the method:

void AX12::setRX () {

#if defined (__AVR_ATmega168__) || defined (__AVR_ATmega328P__)

    bitClear(TIMSK0, TOIE0);   // deshabilita la interrupción del timer0 (nota: esto es sólo para entornos Arduino)

    bitClear(UCSR0B, TXEN0);   // deshabilita la trasmisión

    bitSet(UCSR0B, RXEN0);     // habilita la recepción

    bitSet(UCSR0B, RXCIE0);    // habilita la interrupción de recepción

#elif defined (__AVR_ATmega1280__) || defined (__AVR_ATmega128__) || defined (__AVR_ATmega2560__)

    bitClear(TIMSK0, TOIE0);   // deshabilita la interrupción del timer0 (nota: esto es sólo para entornos Arduino)

    bitClear(UCSR1B, TXEN1);   // deshabilita la trasmisión

    bitSet(UCSR1B, RXEN1);     // habilita la recepción

    bitSet(UCSR1B, RXCIE1);    // habilita la interrupción de recepción

#elif defined (__AVR_ATmega8__)

    bitClear(TIMSK0, TOIE0); // deshabilita la interrupción del timer0 (nota: esto es sólo para entornos Arduino)

    bitClear(UCSRB, TXEN);   // deshabilita la trasmisión

    bitSet(UCSRB, RXEN);     // habilita la recepción

    bitSet(UCSRB, RXCIE);    // habilita la interrupción de recepción 

#endif    

    ax_rx_Pointer = 0;         // resetea el puntero del buffer

}

Unfortunately I cannot understand italy, but I think, it is the "deshabilita la trasmisión" line, that does the trick.

My concern is: What, if an interrupt from some other HW (PC-USB connection, ethernet shield, ..) drops in, and so the TX power is switched off to late?

Thanks for help,
Thomas

Hello,

I found the answer by myself now:

In the mega2560 datasheet it says about the UCSRnB register bit TXENx:

The diabling of the transmitter will not become effective until ongoing and pending transmissions are completed, that is, when the Transmit Shift Register and Transmit Buffer Register do not contain data to be transmitted.

Wow - that's great! So, as the "bitClear(UCSR1B, TXEN1)" will be executed quite some time before the last byte is sent out, this uC internal pending command will already be there, waiting to be executed. Still, at 1Mbit/sec each byte takes only 10 us, so any interrupting ISR must still be quite short (but this is always a requirement for ISRs.), in order to not delay the "bitClear(UCSR1B, TXEN1)" too much.

Thomas

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