Specific assembly output

Hi!

I need an assembly file like the one westfw shared here: Get Compiler to Output Assembly

However, none of the approaches seen on the topics belown worked for me:
How can one view the assembly code output from the Arduino IDE?;
intermediate-asm-code/501460;
how-to-view-assembler-is-it-possible/479348;
see-the-avr-assembly-output-from-the-ide/493516;

Right now, my files are like:

plataformt.txt (i've tried using avrcopy.bat with no success)

# Arduino AVR Core and platform.
# ------------------------------
#
# For more info:
# https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5-3rd-party-Hardware-specification

name=Arduino AVR Boards
version=1.8.3

# AVR compile variables
# ---------------------

compiler.warning_flags=-w
compiler.warning_flags.none=-w
compiler.warning_flags.default=
compiler.warning_flags.more=-Wall
compiler.warning_flags.all=-Wall -Wextra

# Default "compiler.path" is correct, change only if you want to override the initial value
compiler.path={runtime.tools.avr-gcc.path}/bin/
compiler.c.cmd=avr-gcc
compiler.c.flags=-c -g -Os {compiler.warning_flags} -std=gnu11 -ffunction-sections -fdata-sections -MMD -flto -fno-fat-lto-objects
compiler.c.elf.flags={compiler.warning_flags} -Os -g -flto -fuse-linker-plugin -Wl,--gc-sections
compiler.c.elf.cmd=avr-gcc
compiler.S.flags=-c -g -x assembler-with-cpp -flto -MMD
compiler.cpp.cmd=avr-g++
compiler.cpp.flags=-c -g -Os {compiler.warning_flags} -std=gnu++11 -fpermissive -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -Wno-error=narrowing -MMD -flto
compiler.ar.cmd=avr-gcc-ar
compiler.ar.flags=rcs
compiler.objcopy.cmd=avr-objcopy
compiler.objcopy.eep.flags=-O ihex -j .eeprom --set-section-flags=.eeprom=alloc,load --no-change-warnings --change-section-lma .eeprom=0
compiler.elf2hex.flags=-O ihex -R .eeprom
compiler.elf2hex.cmd=avr-objcopy
compiler.ldflags=
compiler.libraries.ldflags=
compiler.size.cmd=avr-size

# This can be overridden in boards.txt
build.extra_flags=

# These can be overridden in platform.local.txt
compiler.c.extra_flags=
compiler.c.elf.extra_flags=
compiler.S.extra_flags=
compiler.cpp.extra_flags=
compiler.ar.extra_flags=
compiler.objcopy.eep.extra_flags=
compiler.elf2hex.extra_flags=

# AVR compile patterns
# --------------------

## Compile c files
recipe.c.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.c.flags} -mmcu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.c.extra_flags} {build.extra_flags} {includes} "{source_file}" -o "{object_file}"

## Compile c++ files
recipe.cpp.o.pattern="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} -mmcu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.cpp.extra_flags} {build.extra_flags} {includes} "{source_file}" -o "{object_file}"

## Compile S files
recipe.S.o.pattern="{compiler.path}{compiler.c.cmd}" {compiler.S.flags} -mmcu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.S.extra_flags} {build.extra_flags} {includes} "{source_file}" -o "{object_file}"

## Create archives
# archive_file_path is needed for backwards compatibility with IDE 1.6.5 or older, IDE 1.6.6 or newer overrides this value
archive_file_path={build.path}/{archive_file}
recipe.ar.pattern="{compiler.path}{compiler.ar.cmd}" {compiler.ar.flags} {compiler.ar.extra_flags} "{archive_file_path}" "{object_file}"

## Combine gc-sections, archives, and objects
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mmcu={build.mcu} {compiler.c.elf.extra_flags} {compiler.ldflags} -o "{build.path}/{build.project_name}.elf" {object_files} {compiler.libraries.ldflags} "{build.path}/{archive_file}" "-L{build.path}" -lm

## Create output files (.eep and .hex)
recipe.objcopy.eep.pattern= "{compiler.path}{compiler.objcopy.cmd}" {compiler.objcopy.eep.flags} {compiler.objcopy.eep.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.eep"
recipe.objcopy.hex.pattern= "{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.hex"  "{build.path}/{build.project_name}.src" "{build.project_name}"
## avrcopy.bat

## Save hex
recipe.output.tmp_file={build.project_name}.hex
recipe.output.save_file={build.project_name}.{build.variant}.hex

## Compute size
recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf"
recipe.size.regex=^(?:\.text|\.data|\.bootloader)\s+([0-9]+).*
recipe.size.regex.data=^(?:\.data|\.bss|\.noinit)\s+([0-9]+).*
recipe.size.regex.eeprom=^(?:\.eeprom)\s+([0-9]+).*

## Preprocessor
preproc.includes.flags=-w -x c++ -M -MG -MP
recipe.preproc.includes="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} {preproc.includes.flags} -mmcu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.cpp.extra_flags} {build.extra_flags} {includes} "{source_file}"

preproc.macros.flags=-w -x c++ -E -CC
recipe.preproc.macros="{compiler.path}{compiler.cpp.cmd}" {compiler.cpp.flags} {preproc.macros.flags} -mmcu={build.mcu} -DF_CPU={build.f_cpu} -DARDUINO={runtime.ide.version} -DARDUINO_{build.board} -DARDUINO_ARCH_{build.arch} {compiler.cpp.extra_flags} {build.extra_flags} {includes} "{source_file}" -o "{preprocessed_file_path}"

# AVR Uploader/Programmers tools
# ------------------------------

tools.avrdude.path={runtime.tools.avrdude.path}
tools.avrdude.cmd.path={path}/bin/avrdude
tools.avrdude.config.path={path}/etc/avrdude.conf

tools.avrdude.network_cmd={runtime.tools.arduinoOTA.path}/bin/arduinoOTA

tools.avrdude.upload.params.verbose=-v
tools.avrdude.upload.params.quiet=-q -q
# tools.avrdude.upload.verify is needed for backwards compatibility with IDE 1.6.8 or older, IDE 1.6.9 or newer overrides this value
tools.avrdude.upload.verify=
tools.avrdude.upload.params.noverify=-V
tools.avrdude.upload.pattern="{cmd.path}" "-C{config.path}" {upload.verbose} {upload.verify} -p{build.mcu} -c{upload.protocol} "-P{serial.port}" -b{upload.speed} -D "-Uflash:w:{build.path}/{build.project_name}.hex:i"

tools.avrdude.program.params.verbose=-v
tools.avrdude.program.params.quiet=-q -q
# tools.avrdude.program.verify is needed for backwards compatibility with IDE 1.6.8 or older, IDE 1.6.9 or newer overrides this value
tools.avrdude.program.verify=
tools.avrdude.program.params.noverify=-V
tools.avrdude.program.pattern="{cmd.path}" "-C{config.path}" {program.verbose} {program.verify} -p{build.mcu} -c{protocol} {program.extra_params} "-Uflash:w:{build.path}/{build.project_name}.hex:i"

tools.avrdude.erase.params.verbose=-v
tools.avrdude.erase.params.quiet=-q -q
tools.avrdude.erase.pattern="{cmd.path}" "-C{config.path}" {erase.verbose} -p{build.mcu} -c{protocol} {program.extra_params} -e -Ulock:w:{bootloader.unlock_bits}:m -Uefuse:w:{bootloader.extended_fuses}:m -Uhfuse:w:{bootloader.high_fuses}:m -Ulfuse:w:{bootloader.low_fuses}:m

tools.avrdude.bootloader.params.verbose=-v
tools.avrdude.bootloader.params.quiet=-q -q
tools.avrdude.bootloader.pattern="{cmd.path}" "-C{config.path}" {bootloader.verbose} -p{build.mcu} -c{protocol} {program.extra_params} "-Uflash:w:{runtime.platform.path}/bootloaders/{bootloader.file}:i" -Ulock:w:{bootloader.lock_bits}:m

tools.avrdude_remote.upload.pattern=/usr/bin/run-avrdude /tmp/sketch.hex {upload.verbose} -p{build.mcu}

tools.avrdude.upload.network_pattern="{network_cmd}" -address {serial.port} -port {upload.network.port} -sketch "{build.path}/{build.project_name}.hex" -upload {upload.network.endpoint_upload} -sync {upload.network.endpoint_sync} -reset {upload.network.endpoint_reset} -sync_exp {upload.network.sync_return}

# USB Default Flags
# Default blank usb manufacturer will be filled in at compile time
# - from numeric vendor ID, set to Unknown otherwise
build.usb_manufacturer="Unknown"
build.usb_flags=-DUSB_VID={build.vid} -DUSB_PID={build.pid} '-DUSB_MANUFACTURER={build.usb_manufacturer}' '-DUSB_PRODUCT={build.usb_product}'

batch that call the python code

@Echo Off
python "C:\Program Files\Python310\Scripts\ds.py"

python code

import fnmatch
import os
import subprocess
import string

pathok = False
pathlist = os.environ['PATH'].split( os.pathsep )
for path in pathlist:
  testme = os.path.join(path,'avr-objdump.exe')
  if os.path.exists(testme):
    pathok = True
    break

if not( pathok ):
  arduinoroot = 'C:\\Program Files (x86)\\Arduino\\'
  pathlist.append( arduinoroot + 'hardware\\tools\\avr\\utils\\bin' )
  pathlist.append( arduinoroot + 'hardware\\tools\\avr\\bin' )
  pathlist.append( arduinoroot + 'hardware\\tools\\avr\\etc' )
  pathnew = os.pathsep.join( pathlist )
  os.environ['PATH'] = pathnew

tempdir = os.environ.get('TEMP')
tempfile_SC = os.path.join(tempdir,'Junk_SC.cpp')
tempfile_d = os.path.join(tempdir,'Junk_d.cpp')

matches = []
for root, dirnames, filenames in os.walk(tempdir):
  for filename in fnmatch.filter(filenames, '*.elf'):
    matches.append(os.path.join(root, filename))

matches.sort( key=os.path.getmtime )

if len(matches) > 0:
  f_SC = open(tempfile_SC, 'w')
  subprocess.call(['avr-objdump.exe','-SC',matches[len(matches)-1]],stdout=f_SC)
  f_SC.close()
  f_d = open(tempfile_d, 'w')
  subprocess.call(['avr-objdump.exe','-d',matches[len(matches)-1]],stdout=f_d)
  f_d.close() 
  os.system( 'start ' + tempfile_SC )
  os.system( 'start ' + tempfile_d )

batch to call avr-objdump with -d as option

@echo off
set /p id="Path to .ino.elf: "
"C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump" -d %id%

batch to call avr-objdump with -S as option

@echo off
set /p id="Path to .ino.elf: "
"C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump" -S %id%

batch to call avr-objdump with -SC as option

@echo off
set /p id="Path to .ino.elf: "
"C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump" -SC %id%

python is 3.10, ide 2.0.0-rc8 and 1.8.19, avr boards package 1.8.5, windows 10 21H2

Can someone, please, help me?

You could try the following.

Open a command prompt, navigate to the folder that contains the .ino.elf file and run the following command:

"C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump" -SC *.ino.elf

If that does not work, please post the output of this command.

1 Like

The compiler explorer https://godbolt.org/ allows you to look at generated code.
Arduino/AVRs are supported.

3 Likes

It worked!!!

.ino code:

void setup() {
  // put your setup code here, to run once:
  int arranjo[5];
  int* ponteiro = (int*) 0xF0F0;
  ponteiro = arranjo;
  Serial.begin(9600);
  Serial.println(sizeof(arranjo));
  Serial.println((long) arranjo);
  Serial.println(sizeof(ponteiro));
  Serial.println((long) ponteiro);
  int a;
  ponteiro = &a;
  Serial.println(sizeof(ponteiro));
  Serial.println((long) ponteiro);
  while(!Serial.available());
  a = (int) Serial.read();
  int novo_arranjo[a];
  Serial.println(sizeof(novo_arranjo));
  Serial.println((long) novo_arranjo);
  unsigned long longo_hex = 0x0FFFFFFF;
  unsigned long longo_dec = 268435455;
  float flutuante_hex = 0x0FFFFFFF;
  float flutuante_dec = 268435455;
  Serial.println();
  Serial.println(longo_hex);
  Serial.println(longo_dec);  
  Serial.println((float) longo_hex);
  Serial.println((float) longo_dec);
  Serial.println(flutuante_hex);
  Serial.println(flutuante_dec);
  Serial.println((long) flutuante_hex);
  Serial.println((long) flutuante_dec);  
}

void loop() {
  // put your main code here, to run repeatedly:

}

The output:

sketch_jun29a.ino.elf:     file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
   0:   0c 94 35 00     jmp     0x6a    ; 0x6a <__ctors_end>
   4:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
   8:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
   c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  10:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  14:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  18:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  1c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  20:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  24:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  28:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  2c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  30:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  34:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  38:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  3c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  40:   0c 94 27 02     jmp     0x44e   ; 0x44e <__vector_16>
  44:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  48:   0c 94 97 02     jmp     0x52e   ; 0x52e <__vector_18>
  4c:   0c 94 71 02     jmp     0x4e2   ; 0x4e2 <__vector_19>
  50:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  54:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  58:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  5c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  60:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  64:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>

00000068 <__ctors_start>:
  68:   d1 03           fmuls   r21, r17

0000006a <__ctors_end>:
  6a:   11 24           eor     r1, r1
  6c:   1f be           out     0x3f, r1        ; 63
  6e:   cf ef           ldi     r28, 0xFF       ; 255
  70:   d8 e0           ldi     r29, 0x08       ; 8
  72:   de bf           out     0x3e, r29       ; 62
  74:   cd bf           out     0x3d, r28       ; 61

00000076 <__do_copy_data>:
  76:   11 e0           ldi     r17, 0x01       ; 1
  78:   a0 e0           ldi     r26, 0x00       ; 0
  7a:   b1 e0           ldi     r27, 0x01       ; 1
  7c:   e0 e5           ldi     r30, 0x50       ; 80
  7e:   f8 e0           ldi     r31, 0x08       ; 8
  80:   02 c0           rjmp    .+4             ; 0x86 <__do_copy_data+0x10>
  82:   05 90           lpm     r0, Z+
  84:   0d 92           st      X+, r0
  86:   a6 31           cpi     r26, 0x16       ; 22
  88:   b1 07           cpc     r27, r17
  8a:   d9 f7           brne    .-10            ; 0x82 <__do_copy_data+0xc>

0000008c <__do_clear_bss>:
  8c:   21 e0           ldi     r18, 0x01       ; 1
  8e:   a6 e1           ldi     r26, 0x16       ; 22
  90:   b1 e0           ldi     r27, 0x01       ; 1
  92:   01 c0           rjmp    .+2             ; 0x96 <.do_clear_bss_start>

00000094 <.do_clear_bss_loop>:
  94:   1d 92           st      X+, r1

00000096 <.do_clear_bss_start>:
  96:   ac 3b           cpi     r26, 0xBC       ; 188
  98:   b2 07           cpc     r27, r18
  9a:   e1 f7           brne    .-8             ; 0x94 <.do_clear_bss_loop>

0000009c <__do_global_ctors>:
  9c:   10 e0           ldi     r17, 0x00       ; 0
  9e:   c5 e3           ldi     r28, 0x35       ; 53
  a0:   d0 e0           ldi     r29, 0x00       ; 0
  a2:   04 c0           rjmp    .+8             ; 0xac <__do_global_ctors+0x10>
  a4:   21 97           sbiw    r28, 0x01       ; 1
  a6:   fe 01           movw    r30, r28
  a8:   0e 94 20 04     call    0x840   ; 0x840 <__tablejump2__>
  ac:   c4 33           cpi     r28, 0x34       ; 52
  ae:   d1 07           cpc     r29, r17
  b0:   c9 f7           brne    .-14            ; 0xa4 <__do_global_ctors+0x8>
  b2:   0e 94 c9 02     call    0x592   ; 0x592 <main>
  b6:   0c 94 26 04     jmp     0x84c   ; 0x84c <_exit>

000000ba <__bad_interrupt>:
  ba:   0c 94 00 00     jmp     0       ; 0x0 <__vectors>

000000be <Print::write(unsigned char const*, unsigned int)>:

// Public Methods //////////////////////////////////////////////////////////////

/* default implementation: may be overridden */
size_t Print::write(const uint8_t *buffer, size_t size)
{
  be:   af 92           push    r10
  c0:   bf 92           push    r11
  c2:   cf 92           push    r12
  c4:   df 92           push    r13
  c6:   ef 92           push    r14
  c8:   ff 92           push    r15
  ca:   0f 93           push    r16
  cc:   1f 93           push    r17
  ce:   cf 93           push    r28
  d0:   df 93           push    r29
  d2:   6c 01           movw    r12, r24
  d4:   7b 01           movw    r14, r22
  d6:   8b 01           movw    r16, r22
  d8:   04 0f           add     r16, r20
  da:   15 1f           adc     r17, r21
  dc:   eb 01           movw    r28, r22
  de:   5e 01           movw    r10, r28
  e0:   ae 18           sub     r10, r14
  e2:   bf 08           sbc     r11, r15
  size_t n = 0;
  while (size--) {
  e4:   c0 17           cp      r28, r16
  e6:   d1 07           cpc     r29, r17
  e8:   59 f0           breq    .+22            ; 0x100 <Print::write(unsigned char const*, unsigned int)+0x42>
    if (write(*buffer++)) n++;
  ea:   69 91           ld      r22, Y+
  ec:   d6 01           movw    r26, r12
  ee:   ed 91           ld      r30, X+
  f0:   fc 91           ld      r31, X
  f2:   01 90           ld      r0, Z+
  f4:   f0 81           ld      r31, Z
  f6:   e0 2d           mov     r30, r0
  f8:   c6 01           movw    r24, r12
  fa:   09 95           icall
  fc:   89 2b           or      r24, r25
  fe:   79 f7           brne    .-34            ; 0xde <Print::write(unsigned char const*, unsigned int)+0x20>
    else break;
  }
  return n;
}
 100:   c5 01           movw    r24, r10
 102:   df 91           pop     r29
 104:   cf 91           pop     r28
 106:   1f 91           pop     r17
 108:   0f 91           pop     r16
 10a:   ff 90           pop     r15
 10c:   ef 90           pop     r14
 10e:   df 90           pop     r13
 110:   cf 90           pop     r12
 112:   bf 90           pop     r11
 114:   af 90           pop     r10
 116:   08 95           ret

00000118 <HardwareSerial::availableForWrite()>:
{
  tx_buffer_index_t head;
  tx_buffer_index_t tail;

  TX_BUFFER_ATOMIC {
    head = _tx_buffer_head;
 118:   fc 01           movw    r30, r24
 11a:   53 8d           ldd     r21, Z+27       ; 0x1b
    tail = _tx_buffer_tail;
 11c:   44 8d           ldd     r20, Z+28       ; 0x1c
 11e:   25 2f           mov     r18, r21
 120:   30 e0           ldi     r19, 0x00       ; 0
 122:   84 2f           mov     r24, r20
 124:   90 e0           ldi     r25, 0x00       ; 0
  }
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
 126:   82 1b           sub     r24, r18
 128:   93 0b           sbc     r25, r19
 12a:   54 17           cp      r21, r20
 12c:   10 f0           brcs    .+4             ; 0x132 <HardwareSerial::availableForWrite()+0x1a>
 12e:   cf 96           adiw    r24, 0x3f       ; 63
 130:   08 95           ret
  return tail - head - 1;
 132:   01 97           sbiw    r24, 0x01       ; 1
}
 134:   08 95           ret

00000136 <HardwareSerial::read()>:
    return _rx_buffer[_rx_buffer_tail];
  }
}

int HardwareSerial::read(void)
{
 136:   fc 01           movw    r30, r24
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
 138:   91 8d           ldd     r25, Z+25       ; 0x19
 13a:   82 8d           ldd     r24, Z+26       ; 0x1a
 13c:   98 17           cp      r25, r24
 13e:   61 f0           breq    .+24            ; 0x158 <HardwareSerial::read()+0x22>
    return -1;
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
 140:   a2 8d           ldd     r26, Z+26       ; 0x1a
 142:   ae 0f           add     r26, r30
 144:   bf 2f           mov     r27, r31
 146:   b1 1d           adc     r27, r1
 148:   5d 96           adiw    r26, 0x1d       ; 29
 14a:   8c 91           ld      r24, X
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
 14c:   92 8d           ldd     r25, Z+26       ; 0x1a
 14e:   9f 5f           subi    r25, 0xFF       ; 255
 150:   9f 73           andi    r25, 0x3F       ; 63
 152:   92 8f           std     Z+26, r25       ; 0x1a
    return c;
 154:   90 e0           ldi     r25, 0x00       ; 0
 156:   08 95           ret

int HardwareSerial::read(void)
{
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 158:   8f ef           ldi     r24, 0xFF       ; 255
 15a:   9f ef           ldi     r25, 0xFF       ; 255
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
    return c;
  }
}
 15c:   08 95           ret

0000015e <HardwareSerial::peek()>:
{
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
}

int HardwareSerial::peek(void)
{
 15e:   fc 01           movw    r30, r24
  if (_rx_buffer_head == _rx_buffer_tail) {
 160:   91 8d           ldd     r25, Z+25       ; 0x19
 162:   82 8d           ldd     r24, Z+26       ; 0x1a
 164:   98 17           cp      r25, r24
 166:   31 f0           breq    .+12            ; 0x174 <HardwareSerial::peek()+0x16>
    return -1;
  } else {
    return _rx_buffer[_rx_buffer_tail];
 168:   82 8d           ldd     r24, Z+26       ; 0x1a
 16a:   e8 0f           add     r30, r24
 16c:   f1 1d           adc     r31, r1
 16e:   85 8d           ldd     r24, Z+29       ; 0x1d
 170:   90 e0           ldi     r25, 0x00       ; 0
 172:   08 95           ret
}

int HardwareSerial::peek(void)
{
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 174:   8f ef           ldi     r24, 0xFF       ; 255
 176:   9f ef           ldi     r25, 0xFF       ; 255
  } else {
    return _rx_buffer[_rx_buffer_tail];
  }
}
 178:   08 95           ret

0000017a <HardwareSerial::available()>:
  // clear any received data
  _rx_buffer_head = _rx_buffer_tail;
}

int HardwareSerial::available(void)
{
 17a:   fc 01           movw    r30, r24
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
 17c:   91 8d           ldd     r25, Z+25       ; 0x19
 17e:   22 8d           ldd     r18, Z+26       ; 0x1a
 180:   89 2f           mov     r24, r25
 182:   90 e0           ldi     r25, 0x00       ; 0
 184:   80 5c           subi    r24, 0xC0       ; 192
 186:   9f 4f           sbci    r25, 0xFF       ; 255
 188:   82 1b           sub     r24, r18
 18a:   91 09           sbc     r25, r1
}
 18c:   8f 73           andi    r24, 0x3F       ; 63
 18e:   99 27           eor     r25, r25
 190:   08 95           ret

00000192 <Serial0_available()>:
#endif

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
 192:   8f e1           ldi     r24, 0x1F       ; 31
 194:   91 e0           ldi     r25, 0x01       ; 1
 196:   0e 94 bd 00     call    0x17a   ; 0x17a <HardwareSerial::available()>
 19a:   21 e0           ldi     r18, 0x01       ; 1
 19c:   89 2b           or      r24, r25
 19e:   09 f4           brne    .+2             ; 0x1a2 <Serial0_available()+0x10>
 1a0:   20 e0           ldi     r18, 0x00       ; 0
}
 1a2:   82 2f           mov     r24, r18
 1a4:   08 95           ret

000001a6 <serialEventRun()>:
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 1a6:   80 e0           ldi     r24, 0x00       ; 0
 1a8:   90 e0           ldi     r25, 0x00       ; 0
 1aa:   89 2b           or      r24, r25
 1ac:   29 f0           breq    .+10            ; 0x1b8 <serialEventRun()+0x12>
 1ae:   0e 94 c9 00     call    0x192   ; 0x192 <Serial0_available()>
 1b2:   81 11           cpse    r24, r1
 1b4:   0c 94 00 00     jmp     0       ; 0x0 <__vectors>
  if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
#endif
#if defined(HAVE_HWSERIAL3)
  if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
#endif
}
 1b8:   08 95           ret

000001ba <HardwareSerial::_tx_udr_empty_irq()>:
#endif

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_tx_udr_empty_irq(void)
{
 1ba:   fc 01           movw    r30, r24
  // If interrupts are enabled, there must be more data in the output
  // buffer. Send the next byte
  unsigned char c = _tx_buffer[_tx_buffer_tail];
 1bc:   a4 8d           ldd     r26, Z+28       ; 0x1c
 1be:   a8 0f           add     r26, r24
 1c0:   b9 2f           mov     r27, r25
 1c2:   b1 1d           adc     r27, r1
 1c4:   a3 5a           subi    r26, 0xA3       ; 163
 1c6:   bf 4f           sbci    r27, 0xFF       ; 255
 1c8:   2c 91           ld      r18, X
  _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
 1ca:   84 8d           ldd     r24, Z+28       ; 0x1c
 1cc:   90 e0           ldi     r25, 0x00       ; 0
 1ce:   01 96           adiw    r24, 0x01       ; 1
 1d0:   8f 73           andi    r24, 0x3F       ; 63
 1d2:   99 27           eor     r25, r25
 1d4:   84 8f           std     Z+28, r24       ; 0x1c

  *_udr = c;
 1d6:   a6 89           ldd     r26, Z+22       ; 0x16
 1d8:   b7 89           ldd     r27, Z+23       ; 0x17
 1da:   2c 93           st      X, r18
  // location". This makes sure flush() won't return until the bytes
  // actually got written. Other r/w bits are preserved, and zeroes
  // written to the rest.

#ifdef MPCM0
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 1dc:   a0 89           ldd     r26, Z+16       ; 0x10
 1de:   b1 89           ldd     r27, Z+17       ; 0x11
 1e0:   8c 91           ld      r24, X
 1e2:   83 70           andi    r24, 0x03       ; 3
 1e4:   80 64           ori     r24, 0x40       ; 64
 1e6:   8c 93           st      X, r24
#else
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif

  if (_tx_buffer_head == _tx_buffer_tail) {
 1e8:   93 8d           ldd     r25, Z+27       ; 0x1b
 1ea:   84 8d           ldd     r24, Z+28       ; 0x1c
 1ec:   98 13           cpse    r25, r24
 1ee:   06 c0           rjmp    .+12            ; 0x1fc <HardwareSerial::_tx_udr_empty_irq()+0x42>
    // Buffer empty, so disable interrupts
    cbi(*_ucsrb, UDRIE0);
 1f0:   02 88           ldd     r0, Z+18        ; 0x12
 1f2:   f3 89           ldd     r31, Z+19       ; 0x13
 1f4:   e0 2d           mov     r30, r0
 1f6:   80 81           ld      r24, Z
 1f8:   8f 7d           andi    r24, 0xDF       ; 223
 1fa:   80 83           st      Z, r24
  }
}
 1fc:   08 95           ret

000001fe <HardwareSerial::write(unsigned char)>:
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}

size_t HardwareSerial::write(uint8_t c)
{
 1fe:   ef 92           push    r14
 200:   ff 92           push    r15
 202:   0f 93           push    r16
 204:   1f 93           push    r17
 206:   cf 93           push    r28
 208:   df 93           push    r29
 20a:   ec 01           movw    r28, r24
  _written = true;
 20c:   81 e0           ldi     r24, 0x01       ; 1
 20e:   88 8f           std     Y+24, r24       ; 0x18
  // If the buffer and the data register is empty, just write the byte
  // to the data register and be done. This shortcut helps
  // significantly improve the effective datarate at high (>
  // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
 210:   9b 8d           ldd     r25, Y+27       ; 0x1b
 212:   8c 8d           ldd     r24, Y+28       ; 0x1c
 214:   98 13           cpse    r25, r24
 216:   1a c0           rjmp    .+52            ; 0x24c <HardwareSerial::write(unsigned char)+0x4e>
 218:   e8 89           ldd     r30, Y+16       ; 0x10
 21a:   f9 89           ldd     r31, Y+17       ; 0x11
 21c:   80 81           ld      r24, Z
 21e:   85 ff           sbrs    r24, 5
 220:   15 c0           rjmp    .+42            ; 0x24c <HardwareSerial::write(unsigned char)+0x4e>
    // So writing UDR must happen first.
    // Writing UDR and clearing TC must be done atomically, otherwise
    // interrupts might delay the TXC clear so the byte written to UDR
    // is transmitted (setting TXC) before clearing TXC. Then TXC will
    // be cleared when no bytes are left, causing flush() to hang
    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 222:   9f b7           in      r25, 0x3f       ; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 224:   f8 94           cli
      *_udr = c;
 226:   ee 89           ldd     r30, Y+22       ; 0x16
 228:   ff 89           ldd     r31, Y+23       ; 0x17
 22a:   60 83           st      Z, r22
#ifdef MPCM0
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 22c:   e8 89           ldd     r30, Y+16       ; 0x10
 22e:   f9 89           ldd     r31, Y+17       ; 0x11
 230:   80 81           ld      r24, Z
 232:   83 70           andi    r24, 0x03       ; 3
 234:   80 64           ori     r24, 0x40       ; 64
  // make atomic to prevent execution of ISR between setting the
  // head pointer and setting the interrupt flag resulting in buffer
  // retransmission
  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
    _tx_buffer_head = i;
    sbi(*_ucsrb, UDRIE0);
 236:   80 83           st      Z, r24
    (void)__s;
}

static __inline__ void __iRestore(const  uint8_t *__s)
{
    SREG = *__s;
 238:   9f bf           out     0x3f, r25       ; 63
  }

  return 1;
}
 23a:   81 e0           ldi     r24, 0x01       ; 1
 23c:   90 e0           ldi     r25, 0x00       ; 0
 23e:   df 91           pop     r29
 240:   cf 91           pop     r28
 242:   1f 91           pop     r17
 244:   0f 91           pop     r16
 246:   ff 90           pop     r15
 248:   ef 90           pop     r14
 24a:   08 95           ret
 24c:   f6 2e           mov     r15, r22
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif
    }
    return 1;
  }
  tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
 24e:   0b 8d           ldd     r16, Y+27       ; 0x1b
 250:   10 e0           ldi     r17, 0x00       ; 0
 252:   0f 5f           subi    r16, 0xFF       ; 255
 254:   1f 4f           sbci    r17, 0xFF       ; 255
 256:   0f 73           andi    r16, 0x3F       ; 63
 258:   11 27           eor     r17, r17
 25a:   e0 2e           mov     r14, r16

  // If the output buffer is full, there's nothing for it other than to
  // wait for the interrupt handler to empty it a bit
  while (i == _tx_buffer_tail) {
 25c:   8c 8d           ldd     r24, Y+28       ; 0x1c
 25e:   8e 11           cpse    r24, r14
 260:   0c c0           rjmp    .+24            ; 0x27a <HardwareSerial::write(unsigned char)+0x7c>
    if (bit_is_clear(SREG, SREG_I)) {
 262:   0f b6           in      r0, 0x3f        ; 63
 264:   07 fc           sbrc    r0, 7
 266:   fa cf           rjmp    .-12            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
      // Interrupts are disabled, so we'll have to poll the data
      // register empty flag ourselves. If it is set, pretend an
      // interrupt has happened and call the handler to free up
      // space for us.
      if(bit_is_set(*_ucsra, UDRE0))
 268:   e8 89           ldd     r30, Y+16       ; 0x10
 26a:   f9 89           ldd     r31, Y+17       ; 0x11
 26c:   80 81           ld      r24, Z
 26e:   85 ff           sbrs    r24, 5
 270:   f5 cf           rjmp    .-22            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
        _tx_udr_empty_irq();
 272:   ce 01           movw    r24, r28
 274:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
 278:   f1 cf           rjmp    .-30            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
    } else {
      // nop, the interrupt handler will free up space for us
    }
  }

  _tx_buffer[_tx_buffer_head] = c;
 27a:   eb 8d           ldd     r30, Y+27       ; 0x1b
 27c:   ec 0f           add     r30, r28
 27e:   fd 2f           mov     r31, r29
 280:   f1 1d           adc     r31, r1
 282:   e3 5a           subi    r30, 0xA3       ; 163
 284:   ff 4f           sbci    r31, 0xFF       ; 255
 286:   f0 82           st      Z, r15

  // make atomic to prevent execution of ISR between setting the
  // head pointer and setting the interrupt flag resulting in buffer
  // retransmission
  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 288:   9f b7           in      r25, 0x3f       ; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 28a:   f8 94           cli
    _tx_buffer_head = i;
 28c:   0b 8f           std     Y+27, r16       ; 0x1b
    sbi(*_ucsrb, UDRIE0);
 28e:   ea 89           ldd     r30, Y+18       ; 0x12
 290:   fb 89           ldd     r31, Y+19       ; 0x13
 292:   80 81           ld      r24, Z
 294:   80 62           ori     r24, 0x20       ; 32
 296:   cf cf           rjmp    .-98            ; 0x236 <HardwareSerial::write(unsigned char)+0x38>

00000298 <HardwareSerial::flush()>:
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  return tail - head - 1;
}

void HardwareSerial::flush()
{
 298:   cf 93           push    r28
 29a:   df 93           push    r29
 29c:   ec 01           movw    r28, r24
  // If we have never written a byte, no need to flush. This special
  // case is needed since there is no way to force the TXC (transmit
  // complete) bit to 1 during initialization
  if (!_written)
 29e:   88 8d           ldd     r24, Y+24       ; 0x18
 2a0:   88 23           and     r24, r24
 2a2:   b9 f0           breq    .+46            ; 0x2d2 <HardwareSerial::flush()+0x3a>
    return;

  while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
 2a4:   aa 89           ldd     r26, Y+18       ; 0x12
 2a6:   bb 89           ldd     r27, Y+19       ; 0x13
 2a8:   e8 89           ldd     r30, Y+16       ; 0x10
 2aa:   f9 89           ldd     r31, Y+17       ; 0x11
 2ac:   8c 91           ld      r24, X
 2ae:   85 fd           sbrc    r24, 5
 2b0:   03 c0           rjmp    .+6             ; 0x2b8 <HardwareSerial::flush()+0x20>
 2b2:   80 81           ld      r24, Z
 2b4:   86 fd           sbrc    r24, 6
 2b6:   0d c0           rjmp    .+26            ; 0x2d2 <HardwareSerial::flush()+0x3a>
    if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
 2b8:   0f b6           in      r0, 0x3f        ; 63
 2ba:   07 fc           sbrc    r0, 7
 2bc:   f7 cf           rjmp    .-18            ; 0x2ac <HardwareSerial::flush()+0x14>
 2be:   8c 91           ld      r24, X
 2c0:   85 ff           sbrs    r24, 5
 2c2:   f2 cf           rjmp    .-28            ; 0x2a8 <HardwareSerial::flush()+0x10>
        // Interrupts are globally disabled, but the DR empty
        // interrupt should be enabled, so poll the DR empty flag to
        // prevent deadlock
        if (bit_is_set(*_ucsra, UDRE0))
 2c4:   80 81           ld      r24, Z
 2c6:   85 ff           sbrs    r24, 5
 2c8:   ed cf           rjmp    .-38            ; 0x2a4 <HardwareSerial::flush()+0xc>
          _tx_udr_empty_irq();
 2ca:   ce 01           movw    r24, r28
 2cc:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
 2d0:   e9 cf           rjmp    .-46            ; 0x2a4 <HardwareSerial::flush()+0xc>
  }
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}
 2d2:   df 91           pop     r29
 2d4:   cf 91           pop     r28
 2d6:   08 95           ret

000002d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>:
    void clearWriteError() { setWriteError(0); }

    virtual size_t write(uint8_t) = 0;
    size_t write(const char *str) {
      if (str == NULL) return 0;
      return write((const uint8_t *)str, strlen(str));
 2d8:   fc 01           movw    r30, r24
 2da:   01 90           ld      r0, Z+
 2dc:   00 20           and     r0, r0
 2de:   e9 f7           brne    .-6             ; 0x2da <Print::write(char const*) [clone .part.2] [clone .constprop.18]+0x2>
 2e0:   31 97           sbiw    r30, 0x01       ; 1
 2e2:   af 01           movw    r20, r30
 2e4:   48 1b           sub     r20, r24
 2e6:   59 0b           sbc     r21, r25
 2e8:   bc 01           movw    r22, r24
 2ea:   8f e1           ldi     r24, 0x1F       ; 31
 2ec:   91 e0           ldi     r25, 0x01       ; 1
 2ee:   0c 94 5f 00     jmp     0xbe    ; 0xbe <Print::write(unsigned char const*, unsigned int)>

000002f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>:
  return n;
}

// Private Methods /////////////////////////////////////////////////////////////

size_t Print::printNumber(unsigned long n, uint8_t base)
 2f2:   8f 92           push    r8
 2f4:   9f 92           push    r9
 2f6:   af 92           push    r10
 2f8:   bf 92           push    r11
 2fa:   0f 93           push    r16
 2fc:   1f 93           push    r17
 2fe:   cf 93           push    r28
 300:   df 93           push    r29
 302:   cd b7           in      r28, 0x3d       ; 61
 304:   de b7           in      r29, 0x3e       ; 62
 306:   a1 97           sbiw    r28, 0x21       ; 33
 308:   0f b6           in      r0, 0x3f        ; 63
 30a:   f8 94           cli
 30c:   de bf           out     0x3e, r29       ; 62
 30e:   0f be           out     0x3f, r0        ; 63
 310:   cd bf           out     0x3d, r28       ; 61
{
  char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte.
  char *str = &buf[sizeof(buf) - 1];

  *str = '\0';
 312:   19 a2           std     Y+33, r1        ; 0x21

  // prevent crash if called with base == 1
  if (base < 2) base = 10;
 314:   42 30           cpi     r20, 0x02       ; 2
 316:   08 f4           brcc    .+2             ; 0x31a <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]+0x28>
 318:   4a e0           ldi     r20, 0x0A       ; 10
 31a:   8e 01           movw    r16, r28
 31c:   0f 5d           subi    r16, 0xDF       ; 223
 31e:   1f 4f           sbci    r17, 0xFF       ; 255

  do {
    char c = n % base;
 320:   84 2e           mov     r8, r20
 322:   91 2c           mov     r9, r1
 324:   b1 2c           mov     r11, r1
 326:   a1 2c           mov     r10, r1
 328:   a5 01           movw    r20, r10
 32a:   94 01           movw    r18, r8
 32c:   0e 94 fe 03     call    0x7fc   ; 0x7fc <__udivmodsi4>
 330:   e6 2f           mov     r30, r22
    n /= base;
 332:   b9 01           movw    r22, r18
 334:   ca 01           movw    r24, r20

    *--str = c < 10 ? c + '0' : c + 'A' - 10;
 336:   ea 30           cpi     r30, 0x0A       ; 10
 338:   f4 f4           brge    .+60            ; 0x376 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]+0x84>
 33a:   e0 5d           subi    r30, 0xD0       ; 208
 33c:   d8 01           movw    r26, r16
 33e:   ee 93           st      -X, r30
 340:   8d 01           movw    r16, r26
  } while(n);
 342:   23 2b           or      r18, r19
 344:   24 2b           or      r18, r20
 346:   25 2b           or      r18, r21
 348:   79 f7           brne    .-34            ; 0x328 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]+0x36>
    int getWriteError() { return write_error; }
    void clearWriteError() { setWriteError(0); }

    virtual size_t write(uint8_t) = 0;
    size_t write(const char *str) {
      if (str == NULL) return 0;
 34a:   90 e0           ldi     r25, 0x00       ; 0
 34c:   80 e0           ldi     r24, 0x00       ; 0
 34e:   10 97           sbiw    r26, 0x00       ; 0
 350:   19 f0           breq    .+6             ; 0x358 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]+0x66>
 352:   cd 01           movw    r24, r26
 354:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>

  return write(str);
}
 358:   a1 96           adiw    r28, 0x21       ; 33
 35a:   0f b6           in      r0, 0x3f        ; 63
 35c:   f8 94           cli
 35e:   de bf           out     0x3e, r29       ; 62
 360:   0f be           out     0x3f, r0        ; 63
 362:   cd bf           out     0x3d, r28       ; 61
 364:   df 91           pop     r29
 366:   cf 91           pop     r28
 368:   1f 91           pop     r17
 36a:   0f 91           pop     r16
 36c:   bf 90           pop     r11
 36e:   af 90           pop     r10
 370:   9f 90           pop     r9
 372:   8f 90           pop     r8
 374:   08 95           ret

  do {
    char c = n % base;
    n /= base;

    *--str = c < 10 ? c + '0' : c + 'A' - 10;
 376:   e9 5c           subi    r30, 0xC9       ; 201
 378:   e1 cf           rjmp    .-62            ; 0x33c <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]+0x4a>

0000037a <Print::println(long, int) [clone .constprop.11]>:
  size_t n = print(num, base);
  n += println();
  return n;
}

size_t Print::println(long num, int base)
 37a:   cf 92           push    r12
 37c:   df 92           push    r13
 37e:   ef 92           push    r14
 380:   ff 92           push    r15
 382:   cf 93           push    r28
 384:   df 93           push    r29
 386:   6b 01           movw    r12, r22
 388:   7c 01           movw    r14, r24
size_t Print::print(long n, int base)
{
  if (base == 0) {
    return write(n);
  } else if (base == 10) {
    if (n < 0) {
 38a:   f7 fe           sbrs    r15, 7
 38c:   1f c0           rjmp    .+62            ; 0x3cc <Print::println(long, int) [clone .constprop.11]+0x52>
  return write(str);
}

size_t Print::print(char c)
{
  return write(c);
 38e:   6d e2           ldi     r22, 0x2D       ; 45
 390:   8f e1           ldi     r24, 0x1F       ; 31
 392:   91 e0           ldi     r25, 0x01       ; 1
 394:   0e 94 ff 00     call    0x1fe   ; 0x1fe <HardwareSerial::write(unsigned char)>
 398:   ec 01           movw    r28, r24
  if (base == 0) {
    return write(n);
  } else if (base == 10) {
    if (n < 0) {
      int t = print('-');
      n = -n;
 39a:   66 27           eor     r22, r22
 39c:   77 27           eor     r23, r23
 39e:   cb 01           movw    r24, r22
 3a0:   6c 19           sub     r22, r12
 3a2:   7d 09           sbc     r23, r13
 3a4:   8e 09           sbc     r24, r14
 3a6:   9f 09           sbc     r25, r15
      return printNumber(n, 10) + t;
 3a8:   4a e0           ldi     r20, 0x0A       ; 10
 3aa:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 3ae:   c8 0f           add     r28, r24
 3b0:   d9 1f           adc     r29, r25
 3b2:   82 e1           ldi     r24, 0x12       ; 18
 3b4:   91 e0           ldi     r25, 0x01       ; 1
 3b6:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
size_t Print::println(long num, int base)
{
  size_t n = print(num, base);
  n += println();
  return n;
}
 3ba:   8c 0f           add     r24, r28
 3bc:   9d 1f           adc     r25, r29
 3be:   df 91           pop     r29
 3c0:   cf 91           pop     r28
 3c2:   ff 90           pop     r15
 3c4:   ef 90           pop     r14
 3c6:   df 90           pop     r13
 3c8:   cf 90           pop     r12
 3ca:   08 95           ret
    if (n < 0) {
      int t = print('-');
      n = -n;
      return printNumber(n, 10) + t;
    }
    return printNumber(n, 10);
 3cc:   4a e0           ldi     r20, 0x0A       ; 10
 3ce:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 3d2:   ec 01           movw    r28, r24
 3d4:   ee cf           rjmp    .-36            ; 0x3b2 <Print::println(long, int) [clone .constprop.11]+0x38>

000003d6 <Print::println(unsigned int, int) [clone .constprop.3]>:
  size_t n = print(num, base);
  n += println();
  return n;
}

size_t Print::println(unsigned int num, int base)
 3d6:   cf 93           push    r28
 3d8:   df 93           push    r29
  return print((long) n, base);
}

size_t Print::print(unsigned int n, int base)
{
  return print((unsigned long) n, base);
 3da:   bc 01           movw    r22, r24
 3dc:   90 e0           ldi     r25, 0x00       ; 0
 3de:   80 e0           ldi     r24, 0x00       ; 0
}

size_t Print::print(unsigned long n, int base)
{
  if (base == 0) return write(n);
  else return printNumber(n, base);
 3e0:   4a e0           ldi     r20, 0x0A       ; 10
 3e2:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 3e6:   ec 01           movw    r28, r24
 3e8:   82 e1           ldi     r24, 0x12       ; 18
 3ea:   91 e0           ldi     r25, 0x01       ; 1
 3ec:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
size_t Print::println(unsigned int num, int base)
{
  size_t n = print(num, base);
  n += println();
  return n;
}
 3f0:   8c 0f           add     r24, r28
 3f2:   9d 1f           adc     r25, r29
 3f4:   df 91           pop     r29
 3f6:   cf 91           pop     r28
 3f8:   08 95           ret

000003fa <Print::println(double, int) [clone .constprop.5]>:
  size_t n = print(num, base);
  n += println();
  return n;
}

size_t Print::println(double num, int digits)
 3fa:   cf 93           push    r28
 3fc:   df 93           push    r29
}

size_t Print::print(unsigned long n, int base)
{
  if (base == 0) return write(n);
  else return printNumber(n, base);
 3fe:   4a e0           ldi     r20, 0x0A       ; 10
 400:   60 e0           ldi     r22, 0x00       ; 0
 402:   70 e0           ldi     r23, 0x00       ; 0
 404:   80 e0           ldi     r24, 0x00       ; 0
 406:   90 e1           ldi     r25, 0x10       ; 16
 408:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 40c:   ec 01           movw    r28, r24
  return write(str);
}

size_t Print::print(char c)
{
  return write(c);
 40e:   6e e2           ldi     r22, 0x2E       ; 46
 410:   8f e1           ldi     r24, 0x1F       ; 31
 412:   91 e0           ldi     r25, 0x01       ; 1
 414:   0e 94 ff 00     call    0x1fe   ; 0x1fe <HardwareSerial::write(unsigned char)>
  double remainder = number - (double)int_part;
  n += print(int_part);

  // Print the decimal point, but only if there are digits beyond
  if (digits > 0) {
    n += print('.');
 418:   c8 0f           add     r28, r24
 41a:   d9 1f           adc     r29, r25
}

size_t Print::print(unsigned long n, int base)
{
  if (base == 0) return write(n);
  else return printNumber(n, base);
 41c:   4a e0           ldi     r20, 0x0A       ; 10
 41e:   60 e0           ldi     r22, 0x00       ; 0
 420:   70 e0           ldi     r23, 0x00       ; 0
 422:   cb 01           movw    r24, r22
 424:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
  // Extract digits from the remainder one at a time
  while (digits-- > 0)
  {
    remainder *= 10.0;
    unsigned int toPrint = (unsigned int)(remainder);
    n += print(toPrint);
 428:   c8 0f           add     r28, r24
 42a:   d9 1f           adc     r29, r25
}

size_t Print::print(unsigned long n, int base)
{
  if (base == 0) return write(n);
  else return printNumber(n, base);
 42c:   4a e0           ldi     r20, 0x0A       ; 10
 42e:   60 e0           ldi     r22, 0x00       ; 0
 430:   70 e0           ldi     r23, 0x00       ; 0
 432:   cb 01           movw    r24, r22
 434:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
  // Extract digits from the remainder one at a time
  while (digits-- > 0)
  {
    remainder *= 10.0;
    unsigned int toPrint = (unsigned int)(remainder);
    n += print(toPrint);
 438:   c8 0f           add     r28, r24
 43a:   d9 1f           adc     r29, r25
 43c:   82 e1           ldi     r24, 0x12       ; 18
 43e:   91 e0           ldi     r25, 0x01       ; 1
 440:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
size_t Print::println(double num, int digits)
{
  size_t n = print(num, digits);
  n += println();
  return n;
}
 444:   8c 0f           add     r24, r28
 446:   9d 1f           adc     r25, r29
 448:   df 91           pop     r29
 44a:   cf 91           pop     r28
 44c:   08 95           ret

0000044e <__vector_16>:
#if defined(TIM0_OVF_vect)
ISR(TIM0_OVF_vect)
#else
ISR(TIMER0_OVF_vect)
#endif
{
 44e:   1f 92           push    r1
 450:   0f 92           push    r0
 452:   0f b6           in      r0, 0x3f        ; 63
 454:   0f 92           push    r0
 456:   11 24           eor     r1, r1
 458:   2f 93           push    r18
 45a:   3f 93           push    r19
 45c:   8f 93           push    r24
 45e:   9f 93           push    r25
 460:   af 93           push    r26
 462:   bf 93           push    r27
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
 464:   80 91 1b 01     lds     r24, 0x011B     ; 0x80011b <timer0_millis>
 468:   90 91 1c 01     lds     r25, 0x011C     ; 0x80011c <timer0_millis+0x1>
 46c:   a0 91 1d 01     lds     r26, 0x011D     ; 0x80011d <timer0_millis+0x2>
 470:   b0 91 1e 01     lds     r27, 0x011E     ; 0x80011e <timer0_millis+0x3>
        unsigned char f = timer0_fract;
 474:   30 91 1a 01     lds     r19, 0x011A     ; 0x80011a <timer0_fract>

        m += MILLIS_INC;
        f += FRACT_INC;
 478:   23 e0           ldi     r18, 0x03       ; 3
 47a:   23 0f           add     r18, r19
        if (f >= FRACT_MAX) {
 47c:   2d 37           cpi     r18, 0x7D       ; 125
 47e:   58 f5           brcc    .+86            ; 0x4d6 <__vector_16+0x88>
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
 480:   01 96           adiw    r24, 0x01       ; 1
 482:   a1 1d           adc     r26, r1
 484:   b1 1d           adc     r27, r1
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
                m += 1;
        }

        timer0_fract = f;
 486:   20 93 1a 01     sts     0x011A, r18     ; 0x80011a <timer0_fract>
        timer0_millis = m;
 48a:   80 93 1b 01     sts     0x011B, r24     ; 0x80011b <timer0_millis>
 48e:   90 93 1c 01     sts     0x011C, r25     ; 0x80011c <timer0_millis+0x1>
 492:   a0 93 1d 01     sts     0x011D, r26     ; 0x80011d <timer0_millis+0x2>
 496:   b0 93 1e 01     sts     0x011E, r27     ; 0x80011e <timer0_millis+0x3>
        timer0_overflow_count++;
 49a:   80 91 16 01     lds     r24, 0x0116     ; 0x800116 <__data_end>
 49e:   90 91 17 01     lds     r25, 0x0117     ; 0x800117 <__data_end+0x1>
 4a2:   a0 91 18 01     lds     r26, 0x0118     ; 0x800118 <__data_end+0x2>
 4a6:   b0 91 19 01     lds     r27, 0x0119     ; 0x800119 <__data_end+0x3>
 4aa:   01 96           adiw    r24, 0x01       ; 1
 4ac:   a1 1d           adc     r26, r1
 4ae:   b1 1d           adc     r27, r1
 4b0:   80 93 16 01     sts     0x0116, r24     ; 0x800116 <__data_end>
 4b4:   90 93 17 01     sts     0x0117, r25     ; 0x800117 <__data_end+0x1>
 4b8:   a0 93 18 01     sts     0x0118, r26     ; 0x800118 <__data_end+0x2>
 4bc:   b0 93 19 01     sts     0x0119, r27     ; 0x800119 <__data_end+0x3>
}
 4c0:   bf 91           pop     r27
 4c2:   af 91           pop     r26
 4c4:   9f 91           pop     r25
 4c6:   8f 91           pop     r24
 4c8:   3f 91           pop     r19
 4ca:   2f 91           pop     r18
 4cc:   0f 90           pop     r0
 4ce:   0f be           out     0x3f, r0        ; 63
 4d0:   0f 90           pop     r0
 4d2:   1f 90           pop     r1
 4d4:   18 95           reti
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
        f += FRACT_INC;
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
 4d6:   26 e8           ldi     r18, 0x86       ; 134
 4d8:   23 0f           add     r18, r19
                m += 1;
 4da:   02 96           adiw    r24, 0x02       ; 2
 4dc:   a1 1d           adc     r26, r1
 4de:   b1 1d           adc     r27, r1
 4e0:   d2 cf           rjmp    .-92            ; 0x486 <__vector_16+0x38>

000004e2 <__vector_19>:
#elif defined(USART_UDRE_vect)
ISR(USART_UDRE_vect)
#else
  #error "Don't know what the Data Register Empty vector is called for Serial"
#endif
{
 4e2:   1f 92           push    r1
 4e4:   0f 92           push    r0
 4e6:   0f b6           in      r0, 0x3f        ; 63
 4e8:   0f 92           push    r0
 4ea:   11 24           eor     r1, r1
 4ec:   2f 93           push    r18
 4ee:   3f 93           push    r19
 4f0:   4f 93           push    r20
 4f2:   5f 93           push    r21
 4f4:   6f 93           push    r22
 4f6:   7f 93           push    r23
 4f8:   8f 93           push    r24
 4fa:   9f 93           push    r25
 4fc:   af 93           push    r26
 4fe:   bf 93           push    r27
 500:   ef 93           push    r30
 502:   ff 93           push    r31
  Serial._tx_udr_empty_irq();
 504:   8f e1           ldi     r24, 0x1F       ; 31
 506:   91 e0           ldi     r25, 0x01       ; 1
 508:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
}
 50c:   ff 91           pop     r31
 50e:   ef 91           pop     r30
 510:   bf 91           pop     r27
 512:   af 91           pop     r26
 514:   9f 91           pop     r25
 516:   8f 91           pop     r24
 518:   7f 91           pop     r23
 51a:   6f 91           pop     r22
 51c:   5f 91           pop     r21
 51e:   4f 91           pop     r20
 520:   3f 91           pop     r19
 522:   2f 91           pop     r18
 524:   0f 90           pop     r0
 526:   0f be           out     0x3f, r0        ; 63
 528:   0f 90           pop     r0
 52a:   1f 90           pop     r1
 52c:   18 95           reti

0000052e <__vector_18>:
#elif defined(USART_RXC_vect)
  ISR(USART_RXC_vect) // ATmega8
#else
  #error "Don't know what the Data Received vector is called for Serial"
#endif
  {
 52e:   1f 92           push    r1
 530:   0f 92           push    r0
 532:   0f b6           in      r0, 0x3f        ; 63
 534:   0f 92           push    r0
 536:   11 24           eor     r1, r1
 538:   2f 93           push    r18
 53a:   8f 93           push    r24
 53c:   9f 93           push    r25
 53e:   ef 93           push    r30
 540:   ff 93           push    r31

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_rx_complete_irq(void)
{
  if (bit_is_clear(*_ucsra, UPE0)) {
 542:   e0 91 2f 01     lds     r30, 0x012F     ; 0x80012f <Serial+0x10>
 546:   f0 91 30 01     lds     r31, 0x0130     ; 0x800130 <Serial+0x11>
 54a:   80 81           ld      r24, Z
 54c:   e0 91 35 01     lds     r30, 0x0135     ; 0x800135 <Serial+0x16>
 550:   f0 91 36 01     lds     r31, 0x0136     ; 0x800136 <Serial+0x17>
 554:   82 fd           sbrc    r24, 2
 556:   1b c0           rjmp    .+54            ; 0x58e <__vector_18+0x60>
    // No Parity error, read byte and store it in the buffer if there is
    // room
    unsigned char c = *_udr;
 558:   90 81           ld      r25, Z
    rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
 55a:   80 91 38 01     lds     r24, 0x0138     ; 0x800138 <Serial+0x19>
 55e:   8f 5f           subi    r24, 0xFF       ; 255
 560:   8f 73           andi    r24, 0x3F       ; 63

    // if we should be storing the received character into the location
    // just before the tail (meaning that the head would advance to the
    // current location of the tail), we're about to overflow the buffer
    // and so we don't write the character or advance the head.
    if (i != _rx_buffer_tail) {
 562:   20 91 39 01     lds     r18, 0x0139     ; 0x800139 <Serial+0x1a>
 566:   82 17           cp      r24, r18
 568:   41 f0           breq    .+16            ; 0x57a <__vector_18+0x4c>
      _rx_buffer[_rx_buffer_head] = c;
 56a:   e0 91 38 01     lds     r30, 0x0138     ; 0x800138 <Serial+0x19>
 56e:   f0 e0           ldi     r31, 0x00       ; 0
 570:   e1 5e           subi    r30, 0xE1       ; 225
 572:   fe 4f           sbci    r31, 0xFE       ; 254
 574:   95 8f           std     Z+29, r25       ; 0x1d
      _rx_buffer_head = i;
 576:   80 93 38 01     sts     0x0138, r24     ; 0x800138 <Serial+0x19>
    Serial._rx_complete_irq();
  }
 57a:   ff 91           pop     r31
 57c:   ef 91           pop     r30
 57e:   9f 91           pop     r25
 580:   8f 91           pop     r24
 582:   2f 91           pop     r18
 584:   0f 90           pop     r0
 586:   0f be           out     0x3f, r0        ; 63
 588:   0f 90           pop     r0
 58a:   1f 90           pop     r1
 58c:   18 95           reti
    }
  } else {
    // Parity error, read byte but discard it
    *_udr;
 58e:   80 81           ld      r24, Z
 590:   f4 cf           rjmp    .-24            ; 0x57a <__vector_18+0x4c>

00000592 <main>:

void setupUSB() __attribute__((weak));
void setupUSB() { }

int main(void)
{
 592:   cf 93           push    r28
 594:   df 93           push    r29
 596:   cd b7           in      r28, 0x3d       ; 61
 598:   de b7           in      r29, 0x3e       ; 62
 59a:   2c 97           sbiw    r28, 0x0c       ; 12
 59c:   0f b6           in      r0, 0x3f        ; 63
 59e:   f8 94           cli
 5a0:   de bf           out     0x3e, r29       ; 62
 5a2:   0f be           out     0x3f, r0        ; 63
 5a4:   cd bf           out     0x3d, r28       ; 61

void init()
{
        // this needs to be called before setup() or some functions won't
        // work there
        sei();
 5a6:   78 94           sei

        // on the ATmega168, timer 0 is also used for fast hardware pwm
        // (using phase-correct PWM would mean that timer 0 overflowed half as often
        // resulting in different millis() behavior on the ATmega8 and ATmega168)
#if defined(TCCR0A) && defined(WGM01)
        sbi(TCCR0A, WGM01);
 5a8:   84 b5           in      r24, 0x24       ; 36
 5aa:   82 60           ori     r24, 0x02       ; 2
 5ac:   84 bd           out     0x24, r24       ; 36
        sbi(TCCR0A, WGM00);
 5ae:   84 b5           in      r24, 0x24       ; 36
 5b0:   81 60           ori     r24, 0x01       ; 1
 5b2:   84 bd           out     0x24, r24       ; 36
        // this combination is for the standard atmega8
        sbi(TCCR0, CS01);
        sbi(TCCR0, CS00);
#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
        // this combination is for the standard 168/328/1280/2560
        sbi(TCCR0B, CS01);
 5b4:   85 b5           in      r24, 0x25       ; 37
 5b6:   82 60           ori     r24, 0x02       ; 2
 5b8:   85 bd           out     0x25, r24       ; 37
        sbi(TCCR0B, CS00);
 5ba:   85 b5           in      r24, 0x25       ; 37
 5bc:   81 60           ori     r24, 0x01       ; 1
 5be:   85 bd           out     0x25, r24       ; 37

        // enable timer 0 overflow interrupt
#if defined(TIMSK) && defined(TOIE0)
        sbi(TIMSK, TOIE0);
#elif defined(TIMSK0) && defined(TOIE0)
        sbi(TIMSK0, TOIE0);
 5c0:   80 91 6e 00     lds     r24, 0x006E     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
 5c4:   81 60           ori     r24, 0x01       ; 1
 5c6:   80 93 6e 00     sts     0x006E, r24     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
        // this is better for motors as it ensures an even waveform
        // note, however, that fast pwm mode can achieve a frequency of up
        // 8 MHz (with a 16 MHz clock) at 50% duty cycle

#if defined(TCCR1B) && defined(CS11) && defined(CS10)
        TCCR1B = 0;
 5ca:   10 92 81 00     sts     0x0081, r1      ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>

        // set timer 1 prescale factor to 64
        sbi(TCCR1B, CS11);
 5ce:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 5d2:   82 60           ori     r24, 0x02       ; 2
 5d4:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
#if F_CPU >= 8000000L
        sbi(TCCR1B, CS10);
 5d8:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 5dc:   81 60           ori     r24, 0x01       ; 1
 5de:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
        sbi(TCCR1, CS10);
#endif
#endif
        // put timer 1 in 8-bit phase correct pwm mode
#if defined(TCCR1A) && defined(WGM10)
        sbi(TCCR1A, WGM10);
 5e2:   80 91 80 00     lds     r24, 0x0080     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>
 5e6:   81 60           ori     r24, 0x01       ; 1
 5e8:   80 93 80 00     sts     0x0080, r24     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>

        // set timer 2 prescale factor to 64
#if defined(TCCR2) && defined(CS22)
        sbi(TCCR2, CS22);
#elif defined(TCCR2B) && defined(CS22)
        sbi(TCCR2B, CS22);
 5ec:   80 91 b1 00     lds     r24, 0x00B1     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>
 5f0:   84 60           ori     r24, 0x04       ; 4
 5f2:   80 93 b1 00     sts     0x00B1, r24     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>

        // configure timer 2 for phase correct pwm (8-bit)
#if defined(TCCR2) && defined(WGM20)
        sbi(TCCR2, WGM20);
#elif defined(TCCR2A) && defined(WGM20)
        sbi(TCCR2A, WGM20);
 5f6:   80 91 b0 00     lds     r24, 0x00B0     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
 5fa:   81 60           ori     r24, 0x01       ; 1
 5fc:   80 93 b0 00     sts     0x00B0, r24     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
#endif

#if defined(ADCSRA)
        // set a2d prescaler so we are inside the desired 50-200 KHz range.
        #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
                sbi(ADCSRA, ADPS2);
 600:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 604:   84 60           ori     r24, 0x04       ; 4
 606:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS1);
 60a:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 60e:   82 60           ori     r24, 0x02       ; 2
 610:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS0);
 614:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 618:   81 60           ori     r24, 0x01       ; 1
 61a:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                cbi(ADCSRA, ADPS2);
                cbi(ADCSRA, ADPS1);
                sbi(ADCSRA, ADPS0);
        #endif
        // enable a2d conversions
        sbi(ADCSRA, ADEN);
 61e:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 622:   80 68           ori     r24, 0x80       ; 128
 624:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
        // here so they can be used as normal digital i/o; they will be
        // reconnected in Serial.begin()
#if defined(UCSRB)
        UCSRB = 0;
#elif defined(UCSR0B)
        UCSR0B = 0;
 628:   10 92 c1 00     sts     0x00C1, r1      ; 0x8000c1 <__DATA_REGION_ORIGIN__+0x61>
  Serial.println((float) longo_hex);
  Serial.println((float) longo_dec);
  Serial.println(flutuante_hex);
  Serial.println(flutuante_dec);
  Serial.println((long) flutuante_hex);
  Serial.println((long) flutuante_dec);
 62c:   0d b7           in      r16, 0x3d       ; 61
 62e:   1e b7           in      r17, 0x3e       ; 62

void HardwareSerial::begin(unsigned long baud, byte config)
{
  // Try u2x mode first
  uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
  *_ucsra = 1 << U2X0;
 630:   e0 91 2f 01     lds     r30, 0x012F     ; 0x80012f <Serial+0x10>
 634:   f0 91 30 01     lds     r31, 0x0130     ; 0x800130 <Serial+0x11>
 638:   82 e0           ldi     r24, 0x02       ; 2
 63a:   80 83           st      Z, r24
    *_ucsra = 0;
    baud_setting = (F_CPU / 8 / baud - 1) / 2;
  }

  // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
  *_ubrrh = baud_setting >> 8;
 63c:   e0 91 2b 01     lds     r30, 0x012B     ; 0x80012b <Serial+0xc>
 640:   f0 91 2c 01     lds     r31, 0x012C     ; 0x80012c <Serial+0xd>
 644:   10 82           st      Z, r1
  *_ubrrl = baud_setting;
 646:   e0 91 2d 01     lds     r30, 0x012D     ; 0x80012d <Serial+0xe>
 64a:   f0 91 2e 01     lds     r31, 0x012E     ; 0x80012e <Serial+0xf>
 64e:   8f ec           ldi     r24, 0xCF       ; 207
 650:   80 83           st      Z, r24

  _written = false;
 652:   10 92 37 01     sts     0x0137, r1      ; 0x800137 <Serial+0x18>

  //set the data bits, parity, and stop bits
#if defined(__AVR_ATmega8__)
  config |= 0x80; // select UCSRC register (shared with UBRRH)
#endif
  *_ucsrc = config;
 656:   e0 91 33 01     lds     r30, 0x0133     ; 0x800133 <Serial+0x14>
 65a:   f0 91 34 01     lds     r31, 0x0134     ; 0x800134 <Serial+0x15>
 65e:   86 e0           ldi     r24, 0x06       ; 6
 660:   80 83           st      Z, r24

  sbi(*_ucsrb, RXEN0);
 662:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 666:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 66a:   80 81           ld      r24, Z
 66c:   80 61           ori     r24, 0x10       ; 16
 66e:   80 83           st      Z, r24
  sbi(*_ucsrb, TXEN0);
 670:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 674:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 678:   80 81           ld      r24, Z
 67a:   88 60           ori     r24, 0x08       ; 8
 67c:   80 83           st      Z, r24
  sbi(*_ucsrb, RXCIE0);
 67e:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 682:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 686:   80 81           ld      r24, Z
 688:   80 68           ori     r24, 0x80       ; 128
 68a:   80 83           st      Z, r24
  cbi(*_ucsrb, UDRIE0);
 68c:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 690:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 694:   80 81           ld      r24, Z
 696:   8f 7d           andi    r24, 0xDF       ; 223
 698:   80 83           st      Z, r24
  // put your setup code here, to run once:
  int arranjo[5];
  int* ponteiro = (int*) 0xF0F0;
  ponteiro = arranjo;
  Serial.begin(9600);
  Serial.println(sizeof(arranjo));
 69a:   8a e0           ldi     r24, 0x0A       ; 10
 69c:   90 e0           ldi     r25, 0x00       ; 0
 69e:   0e 94 eb 01     call    0x3d6   ; 0x3d6 <Print::println(unsigned int, int) [clone .constprop.3]>
  Serial.println((long) arranjo);
 6a2:   ce 01           movw    r24, r28
 6a4:   01 96           adiw    r24, 0x01       ; 1
 6a6:   6c 01           movw    r12, r24
 6a8:   99 0f           add     r25, r25
 6aa:   ee 08           sbc     r14, r14
 6ac:   ff 08           sbc     r15, r15
 6ae:   c7 01           movw    r24, r14
 6b0:   b6 01           movw    r22, r12
 6b2:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
  Serial.println(sizeof(ponteiro));
 6b6:   82 e0           ldi     r24, 0x02       ; 2
 6b8:   90 e0           ldi     r25, 0x00       ; 0
 6ba:   0e 94 eb 01     call    0x3d6   ; 0x3d6 <Print::println(unsigned int, int) [clone .constprop.3]>
  Serial.println((long) ponteiro);
 6be:   c7 01           movw    r24, r14
 6c0:   b6 01           movw    r22, r12
 6c2:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
  int a;
  ponteiro = &a;
  Serial.println(sizeof(ponteiro));
 6c6:   82 e0           ldi     r24, 0x02       ; 2
 6c8:   90 e0           ldi     r25, 0x00       ; 0
 6ca:   0e 94 eb 01     call    0x3d6   ; 0x3d6 <Print::println(unsigned int, int) [clone .constprop.3]>
  Serial.println((long) ponteiro);
 6ce:   be 01           movw    r22, r28
 6d0:   65 5f           subi    r22, 0xF5       ; 245
 6d2:   7f 4f           sbci    r23, 0xFF       ; 255
 6d4:   07 2e           mov     r0, r23
 6d6:   00 0c           add     r0, r0
 6d8:   88 0b           sbc     r24, r24
 6da:   99 0b           sbc     r25, r25
 6dc:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
  while(!Serial.available());
 6e0:   8f e1           ldi     r24, 0x1F       ; 31
 6e2:   91 e0           ldi     r25, 0x01       ; 1
 6e4:   0e 94 bd 00     call    0x17a   ; 0x17a <HardwareSerial::available()>
 6e8:   89 2b           or      r24, r25
 6ea:   d1 f3           breq    .-12            ; 0x6e0 <main+0x14e>
  a = (int) Serial.read();
 6ec:   8f e1           ldi     r24, 0x1F       ; 31
 6ee:   91 e0           ldi     r25, 0x01       ; 1
 6f0:   0e 94 9b 00     call    0x136   ; 0x136 <HardwareSerial::read()>
 6f4:   9c 87           std     Y+12, r25       ; 0x0c
 6f6:   8b 87           std     Y+11, r24       ; 0x0b
  int novo_arranjo[a];
 6f8:   88 0f           add     r24, r24
 6fa:   99 1f           adc     r25, r25
 6fc:   2d b7           in      r18, 0x3d       ; 61
 6fe:   3e b7           in      r19, 0x3e       ; 62
 700:   28 1b           sub     r18, r24
 702:   39 0b           sbc     r19, r25
 704:   0f b6           in      r0, 0x3f        ; 63
 706:   f8 94           cli
 708:   3e bf           out     0x3e, r19       ; 62
 70a:   0f be           out     0x3f, r0        ; 63
 70c:   2d bf           out     0x3d, r18       ; 61
 70e:   2f 5f           subi    r18, 0xFF       ; 255
 710:   3f 4f           sbci    r19, 0xFF       ; 255
 712:   79 01           movw    r14, r18
  Serial.println(sizeof(novo_arranjo));
 714:   0e 94 eb 01     call    0x3d6   ; 0x3d6 <Print::println(unsigned int, int) [clone .constprop.3]>
  Serial.println((long) novo_arranjo);
 718:   b7 01           movw    r22, r14
 71a:   ff 0c           add     r15, r15
 71c:   88 0b           sbc     r24, r24
 71e:   99 0b           sbc     r25, r25
 720:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
 724:   82 e1           ldi     r24, 0x12       ; 18
 726:   91 e0           ldi     r25, 0x01       ; 1
 728:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
}

size_t Print::print(unsigned long n, int base)
{
  if (base == 0) return write(n);
  else return printNumber(n, base);
 72c:   4a e0           ldi     r20, 0x0A       ; 10
 72e:   6f ef           ldi     r22, 0xFF       ; 255
 730:   7f ef           ldi     r23, 0xFF       ; 255
 732:   8f ef           ldi     r24, 0xFF       ; 255
 734:   9f e0           ldi     r25, 0x0F       ; 15
 736:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 73a:   82 e1           ldi     r24, 0x12       ; 18
 73c:   91 e0           ldi     r25, 0x01       ; 1
 73e:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
 742:   4a e0           ldi     r20, 0x0A       ; 10
 744:   6f ef           ldi     r22, 0xFF       ; 255
 746:   7f ef           ldi     r23, 0xFF       ; 255
 748:   8f ef           ldi     r24, 0xFF       ; 255
 74a:   9f e0           ldi     r25, 0x0F       ; 15
 74c:   0e 94 79 01     call    0x2f2   ; 0x2f2 <Print::printNumber(unsigned long, unsigned char) [clone .constprop.15]>
 750:   82 e1           ldi     r24, 0x12       ; 18
 752:   91 e0           ldi     r25, 0x01       ; 1
 754:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <Print::write(char const*) [clone .part.2] [clone .constprop.18]>
  float flutuante_hex = 0x0FFFFFFF;
  float flutuante_dec = 268435455;
  Serial.println();
  Serial.println(longo_hex);
  Serial.println(longo_dec);
  Serial.println((float) longo_hex);
 758:   0e 94 fd 01     call    0x3fa   ; 0x3fa <Print::println(double, int) [clone .constprop.5]>
  Serial.println((float) longo_dec);
 75c:   0e 94 fd 01     call    0x3fa   ; 0x3fa <Print::println(double, int) [clone .constprop.5]>
  Serial.println(flutuante_hex);
 760:   0e 94 fd 01     call    0x3fa   ; 0x3fa <Print::println(double, int) [clone .constprop.5]>
  Serial.println(flutuante_dec);
 764:   0e 94 fd 01     call    0x3fa   ; 0x3fa <Print::println(double, int) [clone .constprop.5]>
  Serial.println((long) flutuante_hex);
 768:   60 e0           ldi     r22, 0x00       ; 0
 76a:   70 e0           ldi     r23, 0x00       ; 0
 76c:   80 e0           ldi     r24, 0x00       ; 0
 76e:   90 e1           ldi     r25, 0x10       ; 16
 770:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
  Serial.println((long) flutuante_dec);
 774:   60 e0           ldi     r22, 0x00       ; 0
 776:   70 e0           ldi     r23, 0x00       ; 0
 778:   80 e0           ldi     r24, 0x00       ; 0
 77a:   90 e1           ldi     r25, 0x10       ; 16
 77c:   0e 94 bd 01     call    0x37a   ; 0x37a <Print::println(long, int) [clone .constprop.11]>
 780:   0f b6           in      r0, 0x3f        ; 63
 782:   f8 94           cli
 784:   1e bf           out     0x3e, r17       ; 62
 786:   0f be           out     0x3f, r0        ; 63
 788:   0d bf           out     0x3d, r16       ; 61
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 78a:   00 e0           ldi     r16, 0x00       ; 0
 78c:   10 e0           ldi     r17, 0x00       ; 0
 78e:   01 15           cp      r16, r1
 790:   11 05           cpc     r17, r1
 792:   e9 f3           breq    .-6             ; 0x78e <main+0x1fc>
 794:   0e 94 c9 00     call    0x192   ; 0x192 <Serial0_available()>
 798:   88 23           and     r24, r24
 79a:   c9 f3           breq    .-14            ; 0x78e <main+0x1fc>
 79c:   0e 94 00 00     call    0       ; 0x0 <__vectors>
 7a0:   f6 cf           rjmp    .-20            ; 0x78e <main+0x1fc>

000007a2 <_GLOBAL__sub_I___vector_18>:
    size_t printNumber(unsigned long, uint8_t);
    size_t printFloat(double, uint8_t);
  protected:
    void setWriteError(int err = 1) { write_error = err; }
  public:
    Print() : write_error(0) {}
 7a2:   ef e1           ldi     r30, 0x1F       ; 31
 7a4:   f1 e0           ldi     r31, 0x01       ; 1
 7a6:   13 82           std     Z+3, r1 ; 0x03
 7a8:   12 82           std     Z+2, r1 ; 0x02
  public:
    virtual int available() = 0;
    virtual int read() = 0;
    virtual int peek() = 0;

    Stream() {_timeout=1000;}
 7aa:   88 ee           ldi     r24, 0xE8       ; 232
 7ac:   93 e0           ldi     r25, 0x03       ; 3
 7ae:   a0 e0           ldi     r26, 0x00       ; 0
 7b0:   b0 e0           ldi     r27, 0x00       ; 0
 7b2:   84 83           std     Z+4, r24        ; 0x04
 7b4:   95 83           std     Z+5, r25        ; 0x05
 7b6:   a6 83           std     Z+6, r26        ; 0x06
 7b8:   b7 83           std     Z+7, r27        ; 0x07
  volatile uint8_t *ucsrc, volatile uint8_t *udr) :
    _ubrrh(ubrrh), _ubrrl(ubrrl),
    _ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
    _udr(udr),
    _rx_buffer_head(0), _rx_buffer_tail(0),
    _tx_buffer_head(0), _tx_buffer_tail(0)
 7ba:   84 e0           ldi     r24, 0x04       ; 4
 7bc:   91 e0           ldi     r25, 0x01       ; 1
 7be:   91 83           std     Z+1, r25        ; 0x01
 7c0:   80 83           st      Z, r24
 7c2:   85 ec           ldi     r24, 0xC5       ; 197
 7c4:   90 e0           ldi     r25, 0x00       ; 0
 7c6:   95 87           std     Z+13, r25       ; 0x0d
 7c8:   84 87           std     Z+12, r24       ; 0x0c
 7ca:   84 ec           ldi     r24, 0xC4       ; 196
 7cc:   90 e0           ldi     r25, 0x00       ; 0
 7ce:   97 87           std     Z+15, r25       ; 0x0f
 7d0:   86 87           std     Z+14, r24       ; 0x0e
 7d2:   80 ec           ldi     r24, 0xC0       ; 192
 7d4:   90 e0           ldi     r25, 0x00       ; 0
 7d6:   91 8b           std     Z+17, r25       ; 0x11
 7d8:   80 8b           std     Z+16, r24       ; 0x10
 7da:   81 ec           ldi     r24, 0xC1       ; 193
 7dc:   90 e0           ldi     r25, 0x00       ; 0
 7de:   93 8b           std     Z+19, r25       ; 0x13
 7e0:   82 8b           std     Z+18, r24       ; 0x12
 7e2:   82 ec           ldi     r24, 0xC2       ; 194
 7e4:   90 e0           ldi     r25, 0x00       ; 0
 7e6:   95 8b           std     Z+21, r25       ; 0x15
 7e8:   84 8b           std     Z+20, r24       ; 0x14
 7ea:   86 ec           ldi     r24, 0xC6       ; 198
 7ec:   90 e0           ldi     r25, 0x00       ; 0
 7ee:   97 8b           std     Z+23, r25       ; 0x17
 7f0:   86 8b           std     Z+22, r24       ; 0x16
 7f2:   11 8e           std     Z+25, r1        ; 0x19
 7f4:   12 8e           std     Z+26, r1        ; 0x1a
 7f6:   13 8e           std     Z+27, r1        ; 0x1b
 7f8:   14 8e           std     Z+28, r1        ; 0x1c

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
}
 7fa:   08 95           ret

000007fc <__udivmodsi4>:
 7fc:   a1 e2           ldi     r26, 0x21       ; 33
 7fe:   1a 2e           mov     r1, r26
 800:   aa 1b           sub     r26, r26
 802:   bb 1b           sub     r27, r27
 804:   fd 01           movw    r30, r26
 806:   0d c0           rjmp    .+26            ; 0x822 <__udivmodsi4_ep>

00000808 <__udivmodsi4_loop>:
 808:   aa 1f           adc     r26, r26
 80a:   bb 1f           adc     r27, r27
 80c:   ee 1f           adc     r30, r30
 80e:   ff 1f           adc     r31, r31
 810:   a2 17           cp      r26, r18
 812:   b3 07           cpc     r27, r19
 814:   e4 07           cpc     r30, r20
 816:   f5 07           cpc     r31, r21
 818:   20 f0           brcs    .+8             ; 0x822 <__udivmodsi4_ep>
 81a:   a2 1b           sub     r26, r18
 81c:   b3 0b           sbc     r27, r19
 81e:   e4 0b           sbc     r30, r20
 820:   f5 0b           sbc     r31, r21

00000822 <__udivmodsi4_ep>:
 822:   66 1f           adc     r22, r22
 824:   77 1f           adc     r23, r23
 826:   88 1f           adc     r24, r24
 828:   99 1f           adc     r25, r25
 82a:   1a 94           dec     r1
 82c:   69 f7           brne    .-38            ; 0x808 <__udivmodsi4_loop>
 82e:   60 95           com     r22
 830:   70 95           com     r23
 832:   80 95           com     r24
 834:   90 95           com     r25
 836:   9b 01           movw    r18, r22
 838:   ac 01           movw    r20, r24
 83a:   bd 01           movw    r22, r26
 83c:   cf 01           movw    r24, r30
 83e:   08 95           ret

00000840 <__tablejump2__>:
 840:   ee 0f           add     r30, r30
 842:   ff 1f           adc     r31, r31
 844:   05 90           lpm     r0, Z+
 846:   f4 91           lpm     r31, Z
 848:   e0 2d           mov     r30, r0
 84a:   09 94           ijmp

0000084c <_exit>:
 84c:   f8 94           cli

0000084e <__stop_program>:
 84e:   ff cf           rjmp    .-2             ; 0x84e <__stop_program>

Thank you!!!

Thank you for the reply!
I'll try this approach too.

Well, actually...

When I run this command

"C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump" -SC operacoes_variaveis.ino.elf

to the .ino.elf of this code:

void setup() {
  // put your setup code here, to run once:
  DDRB  = 0xFF;
  DDRD  = 0x00;
  PORTD = 0x80;
  bool variavel_bool = false;
  int variavel_int = 0x0000;
  long variavel_long = 0x00000000;
  unsigned variavel_unsigned = 0x0000;
  float variavel_float = 0.0;
  char variavel_char = '0';
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_bool = true;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_int = 0xFFFF;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_long = 0xFFFFFFFF;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_unsigned = 0xFFFF;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_float = 3.3;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_char = '1';
  PORTB = 0x00;
}

void loop() {}

The output is

operacoes_variaveis.ino.elf:     file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
   0:   0c 94 34 00     jmp     0x68    ; 0x68 <__ctors_end>
   4:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
   8:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
   c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  10:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  14:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  18:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  1c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  20:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  24:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  28:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  2c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  30:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  34:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  38:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  3c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  40:   0c 94 a2 00     jmp     0x144   ; 0x144 <__vector_16>
  44:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  48:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  4c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  50:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  54:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  58:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  5c:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  60:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>
  64:   0c 94 46 00     jmp     0x8c    ; 0x8c <__bad_interrupt>

00000068 <__ctors_end>:
  68:   11 24           eor     r1, r1
  6a:   1f be           out     0x3f, r1        ; 63
  6c:   cf ef           ldi     r28, 0xFF       ; 255
  6e:   d8 e0           ldi     r29, 0x08       ; 8
  70:   de bf           out     0x3e, r29       ; 62
  72:   cd bf           out     0x3d, r28       ; 61

00000074 <__do_clear_bss>:
  74:   21 e0           ldi     r18, 0x01       ; 1
  76:   a0 e0           ldi     r26, 0x00       ; 0
  78:   b1 e0           ldi     r27, 0x01       ; 1
  7a:   01 c0           rjmp    .+2             ; 0x7e <.do_clear_bss_start>

0000007c <.do_clear_bss_loop>:
  7c:   1d 92           st      X+, r1

0000007e <.do_clear_bss_start>:
  7e:   a9 30           cpi     r26, 0x09       ; 9
  80:   b2 07           cpc     r27, r18
  82:   e1 f7           brne    .-8             ; 0x7c <.do_clear_bss_loop>
  84:   0e 94 ec 00     call    0x1d8   ; 0x1d8 <main>
  88:   0c 94 79 01     jmp     0x2f2   ; 0x2f2 <_exit>

0000008c <__bad_interrupt>:
  8c:   0c 94 00 00     jmp     0       ; 0x0 <__vectors>

00000090 <micros>:
        return m;
}

unsigned long micros() {
        unsigned long m;
        uint8_t oldSREG = SREG, t;
  90:   3f b7           in      r19, 0x3f       ; 63

        cli();
  92:   f8 94           cli
        m = timer0_overflow_count;
  94:   80 91 05 01     lds     r24, 0x0105     ; 0x800105 <timer0_overflow_count>
  98:   90 91 06 01     lds     r25, 0x0106     ; 0x800106 <timer0_overflow_count+0x1>
  9c:   a0 91 07 01     lds     r26, 0x0107     ; 0x800107 <timer0_overflow_count+0x2>
  a0:   b0 91 08 01     lds     r27, 0x0108     ; 0x800108 <timer0_overflow_count+0x3>
#if defined(TCNT0)
        t = TCNT0;
  a4:   26 b5           in      r18, 0x26       ; 38
#else
        #error TIMER 0 not defined
#endif

#ifdef TIFR0
        if ((TIFR0 & _BV(TOV0)) && (t < 255))
  a6:   a8 9b           sbis    0x15, 0 ; 21
  a8:   05 c0           rjmp    .+10            ; 0xb4 <micros+0x24>
  aa:   2f 3f           cpi     r18, 0xFF       ; 255
  ac:   19 f0           breq    .+6             ; 0xb4 <micros+0x24>
                m++;
  ae:   01 96           adiw    r24, 0x01       ; 1
  b0:   a1 1d           adc     r26, r1
  b2:   b1 1d           adc     r27, r1
#else
        if ((TIFR & _BV(TOV0)) && (t < 255))
                m++;
#endif

        SREG = oldSREG;
  b4:   3f bf           out     0x3f, r19       ; 63

        return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
  b6:   ba 2f           mov     r27, r26
  b8:   a9 2f           mov     r26, r25
  ba:   98 2f           mov     r25, r24
  bc:   88 27           eor     r24, r24
  be:   bc 01           movw    r22, r24
  c0:   cd 01           movw    r24, r26
  c2:   62 0f           add     r22, r18
  c4:   71 1d           adc     r23, r1
  c6:   81 1d           adc     r24, r1
  c8:   91 1d           adc     r25, r1
  ca:   42 e0           ldi     r20, 0x02       ; 2
  cc:   66 0f           add     r22, r22
  ce:   77 1f           adc     r23, r23
  d0:   88 1f           adc     r24, r24
  d2:   99 1f           adc     r25, r25
  d4:   4a 95           dec     r20
  d6:   d1 f7           brne    .-12            ; 0xcc <micros+0x3c>
}
  d8:   08 95           ret

000000da <delay.constprop.0>:

void delay(unsigned long ms)
  da:   8f 92           push    r8
  dc:   9f 92           push    r9
  de:   af 92           push    r10
  e0:   bf 92           push    r11
  e2:   cf 92           push    r12
  e4:   df 92           push    r13
  e6:   ef 92           push    r14
  e8:   ff 92           push    r15
{
        uint32_t start = micros();
  ea:   0e 94 48 00     call    0x90    ; 0x90 <micros>
  ee:   4b 01           movw    r8, r22
  f0:   5c 01           movw    r10, r24
  f2:   82 e3           ldi     r24, 0x32       ; 50
  f4:   c8 2e           mov     r12, r24
  f6:   d1 2c           mov     r13, r1
  f8:   e1 2c           mov     r14, r1
  fa:   f1 2c           mov     r15, r1

        while (ms > 0) {
                yield();
                while ( ms > 0 && (micros() - start) >= 1000) {
  fc:   0e 94 48 00     call    0x90    ; 0x90 <micros>
 100:   68 19           sub     r22, r8
 102:   79 09           sbc     r23, r9
 104:   8a 09           sbc     r24, r10
 106:   9b 09           sbc     r25, r11
 108:   68 3e           cpi     r22, 0xE8       ; 232
 10a:   73 40           sbci    r23, 0x03       ; 3
 10c:   81 05           cpc     r24, r1
 10e:   91 05           cpc     r25, r1
 110:   a8 f3           brcs    .-22            ; 0xfc <delay.constprop.0+0x22>
                        ms--;
 112:   21 e0           ldi     r18, 0x01       ; 1
 114:   c2 1a           sub     r12, r18
 116:   d1 08           sbc     r13, r1
 118:   e1 08           sbc     r14, r1
 11a:   f1 08           sbc     r15, r1
                        start += 1000;
 11c:   88 ee           ldi     r24, 0xE8       ; 232
 11e:   88 0e           add     r8, r24
 120:   83 e0           ldi     r24, 0x03       ; 3
 122:   98 1e           adc     r9, r24
 124:   a1 1c           adc     r10, r1
 126:   b1 1c           adc     r11, r1
{
        uint32_t start = micros();

        while (ms > 0) {
                yield();
                while ( ms > 0 && (micros() - start) >= 1000) {
 128:   c1 14           cp      r12, r1
 12a:   d1 04           cpc     r13, r1
 12c:   e1 04           cpc     r14, r1
 12e:   f1 04           cpc     r15, r1
 130:   29 f7           brne    .-54            ; 0xfc <delay.constprop.0+0x22>
                        ms--;
                        start += 1000;
                }
        }
}
 132:   ff 90           pop     r15
 134:   ef 90           pop     r14
 136:   df 90           pop     r13
 138:   cf 90           pop     r12
 13a:   bf 90           pop     r11
 13c:   af 90           pop     r10
 13e:   9f 90           pop     r9
 140:   8f 90           pop     r8
 142:   08 95           ret

00000144 <__vector_16>:
#if defined(TIM0_OVF_vect)
ISR(TIM0_OVF_vect)
#else
ISR(TIMER0_OVF_vect)
#endif
{
 144:   1f 92           push    r1
 146:   0f 92           push    r0
 148:   0f b6           in      r0, 0x3f        ; 63
 14a:   0f 92           push    r0
 14c:   11 24           eor     r1, r1
 14e:   2f 93           push    r18
 150:   3f 93           push    r19
 152:   8f 93           push    r24
 154:   9f 93           push    r25
 156:   af 93           push    r26
 158:   bf 93           push    r27
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
 15a:   80 91 01 01     lds     r24, 0x0101     ; 0x800101 <timer0_millis>
 15e:   90 91 02 01     lds     r25, 0x0102     ; 0x800102 <timer0_millis+0x1>
 162:   a0 91 03 01     lds     r26, 0x0103     ; 0x800103 <timer0_millis+0x2>
 166:   b0 91 04 01     lds     r27, 0x0104     ; 0x800104 <timer0_millis+0x3>
        unsigned char f = timer0_fract;
 16a:   30 91 00 01     lds     r19, 0x0100     ; 0x800100 <_edata>

        m += MILLIS_INC;
        f += FRACT_INC;
 16e:   23 e0           ldi     r18, 0x03       ; 3
 170:   23 0f           add     r18, r19
        if (f >= FRACT_MAX) {
 172:   2d 37           cpi     r18, 0x7D       ; 125
 174:   58 f5           brcc    .+86            ; 0x1cc <__vector_16+0x88>
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
 176:   01 96           adiw    r24, 0x01       ; 1
 178:   a1 1d           adc     r26, r1
 17a:   b1 1d           adc     r27, r1
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
                m += 1;
        }

        timer0_fract = f;
 17c:   20 93 00 01     sts     0x0100, r18     ; 0x800100 <_edata>
        timer0_millis = m;
 180:   80 93 01 01     sts     0x0101, r24     ; 0x800101 <timer0_millis>
 184:   90 93 02 01     sts     0x0102, r25     ; 0x800102 <timer0_millis+0x1>
 188:   a0 93 03 01     sts     0x0103, r26     ; 0x800103 <timer0_millis+0x2>
 18c:   b0 93 04 01     sts     0x0104, r27     ; 0x800104 <timer0_millis+0x3>
        timer0_overflow_count++;
 190:   80 91 05 01     lds     r24, 0x0105     ; 0x800105 <timer0_overflow_count>
 194:   90 91 06 01     lds     r25, 0x0106     ; 0x800106 <timer0_overflow_count+0x1>
 198:   a0 91 07 01     lds     r26, 0x0107     ; 0x800107 <timer0_overflow_count+0x2>
 19c:   b0 91 08 01     lds     r27, 0x0108     ; 0x800108 <timer0_overflow_count+0x3>
 1a0:   01 96           adiw    r24, 0x01       ; 1
 1a2:   a1 1d           adc     r26, r1
 1a4:   b1 1d           adc     r27, r1
 1a6:   80 93 05 01     sts     0x0105, r24     ; 0x800105 <timer0_overflow_count>
 1aa:   90 93 06 01     sts     0x0106, r25     ; 0x800106 <timer0_overflow_count+0x1>
 1ae:   a0 93 07 01     sts     0x0107, r26     ; 0x800107 <timer0_overflow_count+0x2>
 1b2:   b0 93 08 01     sts     0x0108, r27     ; 0x800108 <timer0_overflow_count+0x3>
}
 1b6:   bf 91           pop     r27
 1b8:   af 91           pop     r26
 1ba:   9f 91           pop     r25
 1bc:   8f 91           pop     r24
 1be:   3f 91           pop     r19
 1c0:   2f 91           pop     r18
 1c2:   0f 90           pop     r0
 1c4:   0f be           out     0x3f, r0        ; 63
 1c6:   0f 90           pop     r0
 1c8:   1f 90           pop     r1
 1ca:   18 95           reti
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
        f += FRACT_INC;
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
 1cc:   26 e8           ldi     r18, 0x86       ; 134
 1ce:   23 0f           add     r18, r19
                m += 1;
 1d0:   02 96           adiw    r24, 0x02       ; 2
 1d2:   a1 1d           adc     r26, r1
 1d4:   b1 1d           adc     r27, r1
 1d6:   d2 cf           rjmp    .-92            ; 0x17c <__vector_16+0x38>

000001d8 <main>:

void init()
{
        // this needs to be called before setup() or some functions won't
        // work there
        sei();
 1d8:   78 94           sei

        // on the ATmega168, timer 0 is also used for fast hardware pwm
        // (using phase-correct PWM would mean that timer 0 overflowed half as often
        // resulting in different millis() behavior on the ATmega8 and ATmega168)
#if defined(TCCR0A) && defined(WGM01)
        sbi(TCCR0A, WGM01);
 1da:   84 b5           in      r24, 0x24       ; 36
 1dc:   82 60           ori     r24, 0x02       ; 2
 1de:   84 bd           out     0x24, r24       ; 36
        sbi(TCCR0A, WGM00);
 1e0:   84 b5           in      r24, 0x24       ; 36
 1e2:   81 60           ori     r24, 0x01       ; 1
 1e4:   84 bd           out     0x24, r24       ; 36
        // this combination is for the standard atmega8
        sbi(TCCR0, CS01);
        sbi(TCCR0, CS00);
#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
        // this combination is for the standard 168/328/1280/2560
        sbi(TCCR0B, CS01);
 1e6:   85 b5           in      r24, 0x25       ; 37
 1e8:   82 60           ori     r24, 0x02       ; 2
 1ea:   85 bd           out     0x25, r24       ; 37
        sbi(TCCR0B, CS00);
 1ec:   85 b5           in      r24, 0x25       ; 37
 1ee:   81 60           ori     r24, 0x01       ; 1
 1f0:   85 bd           out     0x25, r24       ; 37

        // enable timer 0 overflow interrupt
#if defined(TIMSK) && defined(TOIE0)
        sbi(TIMSK, TOIE0);
#elif defined(TIMSK0) && defined(TOIE0)
        sbi(TIMSK0, TOIE0);
 1f2:   80 91 6e 00     lds     r24, 0x006E     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
 1f6:   81 60           ori     r24, 0x01       ; 1
 1f8:   80 93 6e 00     sts     0x006E, r24     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
        // this is better for motors as it ensures an even waveform
        // note, however, that fast pwm mode can achieve a frequency of up
        // 8 MHz (with a 16 MHz clock) at 50% duty cycle

#if defined(TCCR1B) && defined(CS11) && defined(CS10)
        TCCR1B = 0;
 1fc:   10 92 81 00     sts     0x0081, r1      ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>

        // set timer 1 prescale factor to 64
        sbi(TCCR1B, CS11);
 200:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 204:   82 60           ori     r24, 0x02       ; 2
 206:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
#if F_CPU >= 8000000L
        sbi(TCCR1B, CS10);
 20a:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 20e:   81 60           ori     r24, 0x01       ; 1
 210:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
        sbi(TCCR1, CS10);
#endif
#endif
        // put timer 1 in 8-bit phase correct pwm mode
#if defined(TCCR1A) && defined(WGM10)
        sbi(TCCR1A, WGM10);
 214:   80 91 80 00     lds     r24, 0x0080     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>
 218:   81 60           ori     r24, 0x01       ; 1
 21a:   80 93 80 00     sts     0x0080, r24     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>

        // set timer 2 prescale factor to 64
#if defined(TCCR2) && defined(CS22)
        sbi(TCCR2, CS22);
#elif defined(TCCR2B) && defined(CS22)
        sbi(TCCR2B, CS22);
 21e:   80 91 b1 00     lds     r24, 0x00B1     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>
 222:   84 60           ori     r24, 0x04       ; 4
 224:   80 93 b1 00     sts     0x00B1, r24     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>

        // configure timer 2 for phase correct pwm (8-bit)
#if defined(TCCR2) && defined(WGM20)
        sbi(TCCR2, WGM20);
#elif defined(TCCR2A) && defined(WGM20)
        sbi(TCCR2A, WGM20);
 228:   80 91 b0 00     lds     r24, 0x00B0     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
 22c:   81 60           ori     r24, 0x01       ; 1
 22e:   80 93 b0 00     sts     0x00B0, r24     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
#endif

#if defined(ADCSRA)
        // set a2d prescaler so we are inside the desired 50-200 KHz range.
        #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
                sbi(ADCSRA, ADPS2);
 232:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 236:   84 60           ori     r24, 0x04       ; 4
 238:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS1);
 23c:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 240:   82 60           ori     r24, 0x02       ; 2
 242:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS0);
 246:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 24a:   81 60           ori     r24, 0x01       ; 1
 24c:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                cbi(ADCSRA, ADPS2);
                cbi(ADCSRA, ADPS1);
                sbi(ADCSRA, ADPS0);
        #endif
        // enable a2d conversions
        sbi(ADCSRA, ADEN);
 250:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 254:   80 68           ori     r24, 0x80       ; 128
 256:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
        // here so they can be used as normal digital i/o; they will be
        // reconnected in Serial.begin()
#if defined(UCSRB)
        UCSRB = 0;
#elif defined(UCSR0B)
        UCSR0B = 0;
 25a:   10 92 c1 00     sts     0x00C1, r1      ; 0x8000c1 <__DATA_REGION_ORIGIN__+0x61>
 25e:   8f ef           ldi     r24, 0xFF       ; 255
 260:   84 b9           out     0x04, r24       ; 4
 262:   1a b8           out     0x0a, r1        ; 10
 264:   80 e8           ldi     r24, 0x80       ; 128
 266:   8b b9           out     0x0b, r24       ; 11
 268:   4f 99           sbic    0x09, 7 ; 9
 26a:   fe cf           rjmp    .-4             ; 0x268 <main+0x90>
 26c:   8f ef           ldi     r24, 0xFF       ; 255
 26e:   85 b9           out     0x05, r24       ; 5
 270:   15 b8           out     0x05, r1        ; 5
 272:   85 b9           out     0x05, r24       ; 5
 274:   15 b8           out     0x05, r1        ; 5
 276:   0e 94 6d 00     call    0xda    ; 0xda <delay.constprop.0>
 27a:   4f 9b           sbis    0x09, 7 ; 9
 27c:   fe cf           rjmp    .-4             ; 0x27a <main+0xa2>
 27e:   4f 99           sbic    0x09, 7 ; 9
 280:   fe cf           rjmp    .-4             ; 0x27e <main+0xa6>
 282:   8f ef           ldi     r24, 0xFF       ; 255
 284:   85 b9           out     0x05, r24       ; 5
 286:   15 b8           out     0x05, r1        ; 5
 288:   85 b9           out     0x05, r24       ; 5
 28a:   15 b8           out     0x05, r1        ; 5
 28c:   0e 94 6d 00     call    0xda    ; 0xda <delay.constprop.0>
 290:   4f 9b           sbis    0x09, 7 ; 9
 292:   fe cf           rjmp    .-4             ; 0x290 <main+0xb8>
 294:   4f 99           sbic    0x09, 7 ; 9
 296:   fe cf           rjmp    .-4             ; 0x294 <main+0xbc>
 298:   8f ef           ldi     r24, 0xFF       ; 255
 29a:   85 b9           out     0x05, r24       ; 5
 29c:   15 b8           out     0x05, r1        ; 5
 29e:   85 b9           out     0x05, r24       ; 5
 2a0:   15 b8           out     0x05, r1        ; 5
 2a2:   0e 94 6d 00     call    0xda    ; 0xda <delay.constprop.0>
 2a6:   4f 9b           sbis    0x09, 7 ; 9
 2a8:   fe cf           rjmp    .-4             ; 0x2a6 <main+0xce>
 2aa:   4f 99           sbic    0x09, 7 ; 9
 2ac:   fe cf           rjmp    .-4             ; 0x2aa <main+0xd2>
 2ae:   8f ef           ldi     r24, 0xFF       ; 255
 2b0:   85 b9           out     0x05, r24       ; 5
 2b2:   15 b8           out     0x05, r1        ; 5
 2b4:   85 b9           out     0x05, r24       ; 5
 2b6:   15 b8           out     0x05, r1        ; 5
 2b8:   0e 94 6d 00     call    0xda    ; 0xda <delay.constprop.0>
 2bc:   4f 9b           sbis    0x09, 7 ; 9
 2be:   fe cf           rjmp    .-4             ; 0x2bc <main+0xe4>
 2c0:   4f 99           sbic    0x09, 7 ; 9
 2c2:   fe cf           rjmp    .-4             ; 0x2c0 <main+0xe8>
 2c4:   8f ef           ldi     r24, 0xFF       ; 255
 2c6:   85 b9           out     0x05, r24       ; 5
 2c8:   15 b8           out     0x05, r1        ; 5
 2ca:   85 b9           out     0x05, r24       ; 5
 2cc:   15 b8           out     0x05, r1        ; 5
 2ce:   0e 94 6d 00     call    0xda    ; 0xda <delay.constprop.0>
 2d2:   4f 9b           sbis    0x09, 7 ; 9
 2d4:   fe cf           rjmp    .-4             ; 0x2d2 <main+0xfa>
 2d6:   4f 99           sbic    0x09, 7 ; 9
 2d8:   fe cf           rjmp    .-4             ; 0x2d6 <main+0xfe>
 2da:   8f ef           ldi     r24, 0xFF       ; 255
 2dc:   85 b9           out     0x05, r24       ; 5
 2de:   15 b8           out     0x05, r1        ; 5
 2e0:   85 b9           out     0x05, r24       ; 5
 2e2:   15 b8           out     0x05, r1        ; 5

        setup();

        for (;;) {
                loop();
                if (serialEventRun) serialEventRun();
 2e4:   c0 e0           ldi     r28, 0x00       ; 0
 2e6:   d0 e0           ldi     r29, 0x00       ; 0
 2e8:   20 97           sbiw    r28, 0x00       ; 0
 2ea:   f1 f3           breq    .-4             ; 0x2e8 <main+0x110>
 2ec:   0e 94 00 00     call    0       ; 0x0 <__vectors>
 2f0:   fb cf           rjmp    .-10            ; 0x2e8 <main+0x110>

000002f2 <_exit>:
 2f2:   f8 94           cli

000002f4 <__stop_program>:
 2f4:   ff cf           rjmp    .-2             ; 0x2f4 <__stop_program>

That looks like the the "main.c" asm. Do you know why it does this?

Maybe it only works if there is a Serial.something in the code.

The .ino.elf of

void setup() {
  DDRB  = 0xFF;
  DDRD  = 0x00;
  PORTD = 0x80;
  bool variavel_bool = false;
  int variavel_int = 0x0000;
  long variavel_long = 0x00000000;
  unsigned variavel_unsigned = 0x0000;
  float variavel_float = 0.0;
  char variavel_char = '0';
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_bool = true;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_int = 0xF0F0;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_long = 0xF0F0F0F0;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_unsigned = 0xF0F0;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_float = 3.3;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_char = '1';
  PORTB = 0x00;

  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_bool != variavel_bool;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_int += variavel_int;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_long += variavel_long;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_unsigned += variavel_unsigned;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_float += variavel_float;
  PORTB = 0x00;
  delay(50);
  while(!(PIND & 0x80));
  while(PIND & 0x80);
  PORTB = 0xFF;
  PORTB = 0x00;
  PORTB = 0xFF;
  variavel_char += variavel_char;
  PORTB = 0x00;
  Serial.begin(300);
  Serial.println();
}

void loop() {}

produces this output

operacoes_variaveis.ino.elf:     file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
   0:   0c 94 35 00     jmp     0x6a    ; 0x6a <__ctors_end>
   4:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
   8:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
   c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  10:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  14:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  18:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  1c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  20:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  24:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  28:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  2c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  30:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  34:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  38:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  3c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  40:   0c 94 1e 02     jmp     0x43c   ; 0x43c <__vector_16>
  44:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  48:   0c 94 ec 01     jmp     0x3d8   ; 0x3d8 <__vector_18>
  4c:   0c 94 c6 01     jmp     0x38c   ; 0x38c <__vector_19>
  50:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  54:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  58:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  5c:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  60:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>
  64:   0c 94 5d 00     jmp     0xba    ; 0xba <__bad_interrupt>

00000068 <__ctors_start>:
  68:   7e 03           fmul    r23, r22

0000006a <__ctors_end>:
  6a:   11 24           eor     r1, r1
  6c:   1f be           out     0x3f, r1        ; 63
  6e:   cf ef           ldi     r28, 0xFF       ; 255
  70:   d8 e0           ldi     r29, 0x08       ; 8
  72:   de bf           out     0x3e, r29       ; 62
  74:   cd bf           out     0x3d, r28       ; 61

00000076 <__do_copy_data>:
  76:   11 e0           ldi     r17, 0x01       ; 1
  78:   a0 e0           ldi     r26, 0x00       ; 0
  7a:   b1 e0           ldi     r27, 0x01       ; 1
  7c:   e6 e6           ldi     r30, 0x66       ; 102
  7e:   f7 e0           ldi     r31, 0x07       ; 7
  80:   02 c0           rjmp    .+4             ; 0x86 <__do_copy_data+0x10>
  82:   05 90           lpm     r0, Z+
  84:   0d 92           st      X+, r0
  86:   a6 31           cpi     r26, 0x16       ; 22
  88:   b1 07           cpc     r27, r17
  8a:   d9 f7           brne    .-10            ; 0x82 <__do_copy_data+0xc>

0000008c <__do_clear_bss>:
  8c:   21 e0           ldi     r18, 0x01       ; 1
  8e:   a6 e1           ldi     r26, 0x16       ; 22
  90:   b1 e0           ldi     r27, 0x01       ; 1
  92:   01 c0           rjmp    .+2             ; 0x96 <.do_clear_bss_start>

00000094 <.do_clear_bss_loop>:
  94:   1d 92           st      X+, r1

00000096 <.do_clear_bss_start>:
  96:   ac 3b           cpi     r26, 0xBC       ; 188
  98:   b2 07           cpc     r27, r18
  9a:   e1 f7           brne    .-8             ; 0x94 <.do_clear_bss_loop>

0000009c <__do_global_ctors>:
  9c:   10 e0           ldi     r17, 0x00       ; 0
  9e:   c5 e3           ldi     r28, 0x35       ; 53
  a0:   d0 e0           ldi     r29, 0x00       ; 0
  a2:   04 c0           rjmp    .+8             ; 0xac <__do_global_ctors+0x10>
  a4:   21 97           sbiw    r28, 0x01       ; 1
  a6:   fe 01           movw    r30, r28
  a8:   0e 94 ab 03     call    0x756   ; 0x756 <__tablejump2__>
  ac:   c4 33           cpi     r28, 0x34       ; 52
  ae:   d1 07           cpc     r29, r17
  b0:   c9 f7           brne    .-14            ; 0xa4 <__do_global_ctors+0x8>
  b2:   0e 94 68 02     call    0x4d0   ; 0x4d0 <main>
  b6:   0c 94 b1 03     jmp     0x762   ; 0x762 <_exit>

000000ba <__bad_interrupt>:
  ba:   0c 94 00 00     jmp     0       ; 0x0 <__vectors>

000000be <Print::write(unsigned char const*, unsigned int)>:

// Public Methods //////////////////////////////////////////////////////////////

/* default implementation: may be overridden */
size_t Print::write(const uint8_t *buffer, size_t size)
{
  be:   af 92           push    r10
  c0:   bf 92           push    r11
  c2:   cf 92           push    r12
  c4:   df 92           push    r13
  c6:   ef 92           push    r14
  c8:   ff 92           push    r15
  ca:   0f 93           push    r16
  cc:   1f 93           push    r17
  ce:   cf 93           push    r28
  d0:   df 93           push    r29
  d2:   6c 01           movw    r12, r24
  d4:   7b 01           movw    r14, r22
  d6:   8b 01           movw    r16, r22
  d8:   04 0f           add     r16, r20
  da:   15 1f           adc     r17, r21
  dc:   eb 01           movw    r28, r22
  de:   5e 01           movw    r10, r28
  e0:   ae 18           sub     r10, r14
  e2:   bf 08           sbc     r11, r15
  size_t n = 0;
  while (size--) {
  e4:   c0 17           cp      r28, r16
  e6:   d1 07           cpc     r29, r17
  e8:   59 f0           breq    .+22            ; 0x100 <Print::write(unsigned char const*, unsigned int)+0x42>
    if (write(*buffer++)) n++;
  ea:   69 91           ld      r22, Y+
  ec:   d6 01           movw    r26, r12
  ee:   ed 91           ld      r30, X+
  f0:   fc 91           ld      r31, X
  f2:   01 90           ld      r0, Z+
  f4:   f0 81           ld      r31, Z
  f6:   e0 2d           mov     r30, r0
  f8:   c6 01           movw    r24, r12
  fa:   09 95           icall
  fc:   89 2b           or      r24, r25
  fe:   79 f7           brne    .-34            ; 0xde <Print::write(unsigned char const*, unsigned int)+0x20>
    else break;
  }
  return n;
}
 100:   c5 01           movw    r24, r10
 102:   df 91           pop     r29
 104:   cf 91           pop     r28
 106:   1f 91           pop     r17
 108:   0f 91           pop     r16
 10a:   ff 90           pop     r15
 10c:   ef 90           pop     r14
 10e:   df 90           pop     r13
 110:   cf 90           pop     r12
 112:   bf 90           pop     r11
 114:   af 90           pop     r10
 116:   08 95           ret

00000118 <HardwareSerial::availableForWrite()>:
{
  tx_buffer_index_t head;
  tx_buffer_index_t tail;

  TX_BUFFER_ATOMIC {
    head = _tx_buffer_head;
 118:   fc 01           movw    r30, r24
 11a:   53 8d           ldd     r21, Z+27       ; 0x1b
    tail = _tx_buffer_tail;
 11c:   44 8d           ldd     r20, Z+28       ; 0x1c
 11e:   25 2f           mov     r18, r21
 120:   30 e0           ldi     r19, 0x00       ; 0
 122:   84 2f           mov     r24, r20
 124:   90 e0           ldi     r25, 0x00       ; 0
  }
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
 126:   82 1b           sub     r24, r18
 128:   93 0b           sbc     r25, r19
 12a:   54 17           cp      r21, r20
 12c:   10 f0           brcs    .+4             ; 0x132 <HardwareSerial::availableForWrite()+0x1a>
 12e:   cf 96           adiw    r24, 0x3f       ; 63
 130:   08 95           ret
  return tail - head - 1;
 132:   01 97           sbiw    r24, 0x01       ; 1
}
 134:   08 95           ret

00000136 <HardwareSerial::read()>:
    return _rx_buffer[_rx_buffer_tail];
  }
}

int HardwareSerial::read(void)
{
 136:   fc 01           movw    r30, r24
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
 138:   91 8d           ldd     r25, Z+25       ; 0x19
 13a:   82 8d           ldd     r24, Z+26       ; 0x1a
 13c:   98 17           cp      r25, r24
 13e:   61 f0           breq    .+24            ; 0x158 <HardwareSerial::read()+0x22>
    return -1;
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
 140:   a2 8d           ldd     r26, Z+26       ; 0x1a
 142:   ae 0f           add     r26, r30
 144:   bf 2f           mov     r27, r31
 146:   b1 1d           adc     r27, r1
 148:   5d 96           adiw    r26, 0x1d       ; 29
 14a:   8c 91           ld      r24, X
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
 14c:   92 8d           ldd     r25, Z+26       ; 0x1a
 14e:   9f 5f           subi    r25, 0xFF       ; 255
 150:   9f 73           andi    r25, 0x3F       ; 63
 152:   92 8f           std     Z+26, r25       ; 0x1a
    return c;
 154:   90 e0           ldi     r25, 0x00       ; 0
 156:   08 95           ret

int HardwareSerial::read(void)
{
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 158:   8f ef           ldi     r24, 0xFF       ; 255
 15a:   9f ef           ldi     r25, 0xFF       ; 255
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
    return c;
  }
}
 15c:   08 95           ret

0000015e <HardwareSerial::peek()>:
{
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
}

int HardwareSerial::peek(void)
{
 15e:   fc 01           movw    r30, r24
  if (_rx_buffer_head == _rx_buffer_tail) {
 160:   91 8d           ldd     r25, Z+25       ; 0x19
 162:   82 8d           ldd     r24, Z+26       ; 0x1a
 164:   98 17           cp      r25, r24
 166:   31 f0           breq    .+12            ; 0x174 <HardwareSerial::peek()+0x16>
    return -1;
  } else {
    return _rx_buffer[_rx_buffer_tail];
 168:   82 8d           ldd     r24, Z+26       ; 0x1a
 16a:   e8 0f           add     r30, r24
 16c:   f1 1d           adc     r31, r1
 16e:   85 8d           ldd     r24, Z+29       ; 0x1d
 170:   90 e0           ldi     r25, 0x00       ; 0
 172:   08 95           ret
}

int HardwareSerial::peek(void)
{
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 174:   8f ef           ldi     r24, 0xFF       ; 255
 176:   9f ef           ldi     r25, 0xFF       ; 255
  } else {
    return _rx_buffer[_rx_buffer_tail];
  }
}
 178:   08 95           ret

0000017a <HardwareSerial::available()>:
  // clear any received data
  _rx_buffer_head = _rx_buffer_tail;
}

int HardwareSerial::available(void)
{
 17a:   fc 01           movw    r30, r24
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
 17c:   91 8d           ldd     r25, Z+25       ; 0x19
 17e:   22 8d           ldd     r18, Z+26       ; 0x1a
 180:   89 2f           mov     r24, r25
 182:   90 e0           ldi     r25, 0x00       ; 0
 184:   80 5c           subi    r24, 0xC0       ; 192
 186:   9f 4f           sbci    r25, 0xFF       ; 255
 188:   82 1b           sub     r24, r18
 18a:   91 09           sbc     r25, r1
}
 18c:   8f 73           andi    r24, 0x3F       ; 63
 18e:   99 27           eor     r25, r25
 190:   08 95           ret

00000192 <Serial0_available()>:
#endif

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
 192:   8f e1           ldi     r24, 0x1F       ; 31
 194:   91 e0           ldi     r25, 0x01       ; 1
 196:   0e 94 bd 00     call    0x17a   ; 0x17a <HardwareSerial::available()>
 19a:   21 e0           ldi     r18, 0x01       ; 1
 19c:   89 2b           or      r24, r25
 19e:   09 f4           brne    .+2             ; 0x1a2 <Serial0_available()+0x10>
 1a0:   20 e0           ldi     r18, 0x00       ; 0
}
 1a2:   82 2f           mov     r24, r18
 1a4:   08 95           ret

000001a6 <serialEventRun()>:
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 1a6:   80 e0           ldi     r24, 0x00       ; 0
 1a8:   90 e0           ldi     r25, 0x00       ; 0
 1aa:   89 2b           or      r24, r25
 1ac:   29 f0           breq    .+10            ; 0x1b8 <serialEventRun()+0x12>
 1ae:   0e 94 c9 00     call    0x192   ; 0x192 <Serial0_available()>
 1b2:   81 11           cpse    r24, r1
 1b4:   0c 94 00 00     jmp     0       ; 0x0 <__vectors>
  if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
#endif
#if defined(HAVE_HWSERIAL3)
  if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
#endif
}
 1b8:   08 95           ret

000001ba <HardwareSerial::_tx_udr_empty_irq()>:
#endif

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_tx_udr_empty_irq(void)
{
 1ba:   fc 01           movw    r30, r24
  // If interrupts are enabled, there must be more data in the output
  // buffer. Send the next byte
  unsigned char c = _tx_buffer[_tx_buffer_tail];
 1bc:   a4 8d           ldd     r26, Z+28       ; 0x1c
 1be:   a8 0f           add     r26, r24
 1c0:   b9 2f           mov     r27, r25
 1c2:   b1 1d           adc     r27, r1
 1c4:   a3 5a           subi    r26, 0xA3       ; 163
 1c6:   bf 4f           sbci    r27, 0xFF       ; 255
 1c8:   2c 91           ld      r18, X
  _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
 1ca:   84 8d           ldd     r24, Z+28       ; 0x1c
 1cc:   90 e0           ldi     r25, 0x00       ; 0
 1ce:   01 96           adiw    r24, 0x01       ; 1
 1d0:   8f 73           andi    r24, 0x3F       ; 63
 1d2:   99 27           eor     r25, r25
 1d4:   84 8f           std     Z+28, r24       ; 0x1c

  *_udr = c;
 1d6:   a6 89           ldd     r26, Z+22       ; 0x16
 1d8:   b7 89           ldd     r27, Z+23       ; 0x17
 1da:   2c 93           st      X, r18
  // location". This makes sure flush() won't return until the bytes
  // actually got written. Other r/w bits are preserved, and zeroes
  // written to the rest.

#ifdef MPCM0
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 1dc:   a0 89           ldd     r26, Z+16       ; 0x10
 1de:   b1 89           ldd     r27, Z+17       ; 0x11
 1e0:   8c 91           ld      r24, X
 1e2:   83 70           andi    r24, 0x03       ; 3
 1e4:   80 64           ori     r24, 0x40       ; 64
 1e6:   8c 93           st      X, r24
#else
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif

  if (_tx_buffer_head == _tx_buffer_tail) {
 1e8:   93 8d           ldd     r25, Z+27       ; 0x1b
 1ea:   84 8d           ldd     r24, Z+28       ; 0x1c
 1ec:   98 13           cpse    r25, r24
 1ee:   06 c0           rjmp    .+12            ; 0x1fc <HardwareSerial::_tx_udr_empty_irq()+0x42>
    // Buffer empty, so disable interrupts
    cbi(*_ucsrb, UDRIE0);
 1f0:   02 88           ldd     r0, Z+18        ; 0x12
 1f2:   f3 89           ldd     r31, Z+19       ; 0x13
 1f4:   e0 2d           mov     r30, r0
 1f6:   80 81           ld      r24, Z
 1f8:   8f 7d           andi    r24, 0xDF       ; 223
 1fa:   80 83           st      Z, r24
  }
}
 1fc:   08 95           ret

000001fe <HardwareSerial::write(unsigned char)>:
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}

size_t HardwareSerial::write(uint8_t c)
{
 1fe:   ef 92           push    r14
 200:   ff 92           push    r15
 202:   0f 93           push    r16
 204:   1f 93           push    r17
 206:   cf 93           push    r28
 208:   df 93           push    r29
 20a:   ec 01           movw    r28, r24
  _written = true;
 20c:   81 e0           ldi     r24, 0x01       ; 1
 20e:   88 8f           std     Y+24, r24       ; 0x18
  // If the buffer and the data register is empty, just write the byte
  // to the data register and be done. This shortcut helps
  // significantly improve the effective datarate at high (>
  // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
 210:   9b 8d           ldd     r25, Y+27       ; 0x1b
 212:   8c 8d           ldd     r24, Y+28       ; 0x1c
 214:   98 13           cpse    r25, r24
 216:   1a c0           rjmp    .+52            ; 0x24c <HardwareSerial::write(unsigned char)+0x4e>
 218:   e8 89           ldd     r30, Y+16       ; 0x10
 21a:   f9 89           ldd     r31, Y+17       ; 0x11
 21c:   80 81           ld      r24, Z
 21e:   85 ff           sbrs    r24, 5
 220:   15 c0           rjmp    .+42            ; 0x24c <HardwareSerial::write(unsigned char)+0x4e>
    // So writing UDR must happen first.
    // Writing UDR and clearing TC must be done atomically, otherwise
    // interrupts might delay the TXC clear so the byte written to UDR
    // is transmitted (setting TXC) before clearing TXC. Then TXC will
    // be cleared when no bytes are left, causing flush() to hang
    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 222:   9f b7           in      r25, 0x3f       ; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 224:   f8 94           cli
      *_udr = c;
 226:   ee 89           ldd     r30, Y+22       ; 0x16
 228:   ff 89           ldd     r31, Y+23       ; 0x17
 22a:   60 83           st      Z, r22
#ifdef MPCM0
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 22c:   e8 89           ldd     r30, Y+16       ; 0x10
 22e:   f9 89           ldd     r31, Y+17       ; 0x11
 230:   80 81           ld      r24, Z
 232:   83 70           andi    r24, 0x03       ; 3
 234:   80 64           ori     r24, 0x40       ; 64
  // make atomic to prevent execution of ISR between setting the
  // head pointer and setting the interrupt flag resulting in buffer
  // retransmission
  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
    _tx_buffer_head = i;
    sbi(*_ucsrb, UDRIE0);
 236:   80 83           st      Z, r24
    (void)__s;
}

static __inline__ void __iRestore(const  uint8_t *__s)
{
    SREG = *__s;
 238:   9f bf           out     0x3f, r25       ; 63
  }

  return 1;
}
 23a:   81 e0           ldi     r24, 0x01       ; 1
 23c:   90 e0           ldi     r25, 0x00       ; 0
 23e:   df 91           pop     r29
 240:   cf 91           pop     r28
 242:   1f 91           pop     r17
 244:   0f 91           pop     r16
 246:   ff 90           pop     r15
 248:   ef 90           pop     r14
 24a:   08 95           ret
 24c:   f6 2e           mov     r15, r22
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif
    }
    return 1;
  }
  tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
 24e:   0b 8d           ldd     r16, Y+27       ; 0x1b
 250:   10 e0           ldi     r17, 0x00       ; 0
 252:   0f 5f           subi    r16, 0xFF       ; 255
 254:   1f 4f           sbci    r17, 0xFF       ; 255
 256:   0f 73           andi    r16, 0x3F       ; 63
 258:   11 27           eor     r17, r17
 25a:   e0 2e           mov     r14, r16

  // If the output buffer is full, there's nothing for it other than to
  // wait for the interrupt handler to empty it a bit
  while (i == _tx_buffer_tail) {
 25c:   8c 8d           ldd     r24, Y+28       ; 0x1c
 25e:   8e 11           cpse    r24, r14
 260:   0c c0           rjmp    .+24            ; 0x27a <HardwareSerial::write(unsigned char)+0x7c>
    if (bit_is_clear(SREG, SREG_I)) {
 262:   0f b6           in      r0, 0x3f        ; 63
 264:   07 fc           sbrc    r0, 7
 266:   fa cf           rjmp    .-12            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
      // Interrupts are disabled, so we'll have to poll the data
      // register empty flag ourselves. If it is set, pretend an
      // interrupt has happened and call the handler to free up
      // space for us.
      if(bit_is_set(*_ucsra, UDRE0))
 268:   e8 89           ldd     r30, Y+16       ; 0x10
 26a:   f9 89           ldd     r31, Y+17       ; 0x11
 26c:   80 81           ld      r24, Z
 26e:   85 ff           sbrs    r24, 5
 270:   f5 cf           rjmp    .-22            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
        _tx_udr_empty_irq();
 272:   ce 01           movw    r24, r28
 274:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
 278:   f1 cf           rjmp    .-30            ; 0x25c <HardwareSerial::write(unsigned char)+0x5e>
    } else {
      // nop, the interrupt handler will free up space for us
    }
  }

  _tx_buffer[_tx_buffer_head] = c;
 27a:   eb 8d           ldd     r30, Y+27       ; 0x1b
 27c:   ec 0f           add     r30, r28
 27e:   fd 2f           mov     r31, r29
 280:   f1 1d           adc     r31, r1
 282:   e3 5a           subi    r30, 0xA3       ; 163
 284:   ff 4f           sbci    r31, 0xFF       ; 255
 286:   f0 82           st      Z, r15

  // make atomic to prevent execution of ISR between setting the
  // head pointer and setting the interrupt flag resulting in buffer
  // retransmission
  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 288:   9f b7           in      r25, 0x3f       ; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 28a:   f8 94           cli
    _tx_buffer_head = i;
 28c:   0b 8f           std     Y+27, r16       ; 0x1b
    sbi(*_ucsrb, UDRIE0);
 28e:   ea 89           ldd     r30, Y+18       ; 0x12
 290:   fb 89           ldd     r31, Y+19       ; 0x13
 292:   80 81           ld      r24, Z
 294:   80 62           ori     r24, 0x20       ; 32
 296:   cf cf           rjmp    .-98            ; 0x236 <HardwareSerial::write(unsigned char)+0x38>

00000298 <HardwareSerial::flush()>:
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  return tail - head - 1;
}

void HardwareSerial::flush()
{
 298:   cf 93           push    r28
 29a:   df 93           push    r29
 29c:   ec 01           movw    r28, r24
  // If we have never written a byte, no need to flush. This special
  // case is needed since there is no way to force the TXC (transmit
  // complete) bit to 1 during initialization
  if (!_written)
 29e:   88 8d           ldd     r24, Y+24       ; 0x18
 2a0:   88 23           and     r24, r24
 2a2:   b9 f0           breq    .+46            ; 0x2d2 <HardwareSerial::flush()+0x3a>
    return;

  while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
 2a4:   aa 89           ldd     r26, Y+18       ; 0x12
 2a6:   bb 89           ldd     r27, Y+19       ; 0x13
 2a8:   e8 89           ldd     r30, Y+16       ; 0x10
 2aa:   f9 89           ldd     r31, Y+17       ; 0x11
 2ac:   8c 91           ld      r24, X
 2ae:   85 fd           sbrc    r24, 5
 2b0:   03 c0           rjmp    .+6             ; 0x2b8 <HardwareSerial::flush()+0x20>
 2b2:   80 81           ld      r24, Z
 2b4:   86 fd           sbrc    r24, 6
 2b6:   0d c0           rjmp    .+26            ; 0x2d2 <HardwareSerial::flush()+0x3a>
    if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
 2b8:   0f b6           in      r0, 0x3f        ; 63
 2ba:   07 fc           sbrc    r0, 7
 2bc:   f7 cf           rjmp    .-18            ; 0x2ac <HardwareSerial::flush()+0x14>
 2be:   8c 91           ld      r24, X
 2c0:   85 ff           sbrs    r24, 5
 2c2:   f2 cf           rjmp    .-28            ; 0x2a8 <HardwareSerial::flush()+0x10>
        // Interrupts are globally disabled, but the DR empty
        // interrupt should be enabled, so poll the DR empty flag to
        // prevent deadlock
        if (bit_is_set(*_ucsra, UDRE0))
 2c4:   80 81           ld      r24, Z
 2c6:   85 ff           sbrs    r24, 5
 2c8:   ed cf           rjmp    .-38            ; 0x2a4 <HardwareSerial::flush()+0xc>
          _tx_udr_empty_irq();
 2ca:   ce 01           movw    r24, r28
 2cc:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
 2d0:   e9 cf           rjmp    .-46            ; 0x2a4 <HardwareSerial::flush()+0xc>
  }
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}
 2d2:   df 91           pop     r29
 2d4:   cf 91           pop     r28
 2d6:   08 95           ret

000002d8 <micros>:
        return m;
}

unsigned long micros() {
        unsigned long m;
        uint8_t oldSREG = SREG, t;
 2d8:   3f b7           in      r19, 0x3f       ; 63

        cli();
 2da:   f8 94           cli
        m = timer0_overflow_count;
 2dc:   80 91 1b 01     lds     r24, 0x011B     ; 0x80011b <timer0_overflow_count>
 2e0:   90 91 1c 01     lds     r25, 0x011C     ; 0x80011c <timer0_overflow_count+0x1>
 2e4:   a0 91 1d 01     lds     r26, 0x011D     ; 0x80011d <timer0_overflow_count+0x2>
 2e8:   b0 91 1e 01     lds     r27, 0x011E     ; 0x80011e <timer0_overflow_count+0x3>
#if defined(TCNT0)
        t = TCNT0;
 2ec:   26 b5           in      r18, 0x26       ; 38
#else
        #error TIMER 0 not defined
#endif

#ifdef TIFR0
        if ((TIFR0 & _BV(TOV0)) && (t < 255))
 2ee:   a8 9b           sbis    0x15, 0 ; 21
 2f0:   05 c0           rjmp    .+10            ; 0x2fc <micros+0x24>
 2f2:   2f 3f           cpi     r18, 0xFF       ; 255
 2f4:   19 f0           breq    .+6             ; 0x2fc <micros+0x24>
                m++;
 2f6:   01 96           adiw    r24, 0x01       ; 1
 2f8:   a1 1d           adc     r26, r1
 2fa:   b1 1d           adc     r27, r1
#else
        if ((TIFR & _BV(TOV0)) && (t < 255))
                m++;
#endif

        SREG = oldSREG;
 2fc:   3f bf           out     0x3f, r19       ; 63

        return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
 2fe:   ba 2f           mov     r27, r26
 300:   a9 2f           mov     r26, r25
 302:   98 2f           mov     r25, r24
 304:   88 27           eor     r24, r24
 306:   bc 01           movw    r22, r24
 308:   cd 01           movw    r24, r26
 30a:   62 0f           add     r22, r18
 30c:   71 1d           adc     r23, r1
 30e:   81 1d           adc     r24, r1
 310:   91 1d           adc     r25, r1
 312:   42 e0           ldi     r20, 0x02       ; 2
 314:   66 0f           add     r22, r22
 316:   77 1f           adc     r23, r23
 318:   88 1f           adc     r24, r24
 31a:   99 1f           adc     r25, r25
 31c:   4a 95           dec     r20
 31e:   d1 f7           brne    .-12            ; 0x314 <micros+0x3c>
}
 320:   08 95           ret

00000322 <delay.constprop.3>:

void delay(unsigned long ms)
 322:   8f 92           push    r8
 324:   9f 92           push    r9
 326:   af 92           push    r10
 328:   bf 92           push    r11
 32a:   cf 92           push    r12
 32c:   df 92           push    r13
 32e:   ef 92           push    r14
 330:   ff 92           push    r15
{
        uint32_t start = micros();
 332:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <micros>
 336:   4b 01           movw    r8, r22
 338:   5c 01           movw    r10, r24
 33a:   82 e3           ldi     r24, 0x32       ; 50
 33c:   c8 2e           mov     r12, r24
 33e:   d1 2c           mov     r13, r1
 340:   e1 2c           mov     r14, r1
 342:   f1 2c           mov     r15, r1

        while (ms > 0) {
                yield();
                while ( ms > 0 && (micros() - start) >= 1000) {
 344:   0e 94 6c 01     call    0x2d8   ; 0x2d8 <micros>
 348:   68 19           sub     r22, r8
 34a:   79 09           sbc     r23, r9
 34c:   8a 09           sbc     r24, r10
 34e:   9b 09           sbc     r25, r11
 350:   68 3e           cpi     r22, 0xE8       ; 232
 352:   73 40           sbci    r23, 0x03       ; 3
 354:   81 05           cpc     r24, r1
 356:   91 05           cpc     r25, r1
 358:   a8 f3           brcs    .-22            ; 0x344 <delay.constprop.3+0x22>
                        ms--;
 35a:   21 e0           ldi     r18, 0x01       ; 1
 35c:   c2 1a           sub     r12, r18
 35e:   d1 08           sbc     r13, r1
 360:   e1 08           sbc     r14, r1
 362:   f1 08           sbc     r15, r1
                        start += 1000;
 364:   88 ee           ldi     r24, 0xE8       ; 232
 366:   88 0e           add     r8, r24
 368:   83 e0           ldi     r24, 0x03       ; 3
 36a:   98 1e           adc     r9, r24
 36c:   a1 1c           adc     r10, r1
 36e:   b1 1c           adc     r11, r1
{
        uint32_t start = micros();

        while (ms > 0) {
                yield();
                while ( ms > 0 && (micros() - start) >= 1000) {
 370:   c1 14           cp      r12, r1
 372:   d1 04           cpc     r13, r1
 374:   e1 04           cpc     r14, r1
 376:   f1 04           cpc     r15, r1
 378:   29 f7           brne    .-54            ; 0x344 <delay.constprop.3+0x22>
                        ms--;
                        start += 1000;
                }
        }
}
 37a:   ff 90           pop     r15
 37c:   ef 90           pop     r14
 37e:   df 90           pop     r13
 380:   cf 90           pop     r12
 382:   bf 90           pop     r11
 384:   af 90           pop     r10
 386:   9f 90           pop     r9
 388:   8f 90           pop     r8
 38a:   08 95           ret

0000038c <__vector_19>:
#elif defined(USART_UDRE_vect)
ISR(USART_UDRE_vect)
#else
  #error "Don't know what the Data Register Empty vector is called for Serial"
#endif
{
 38c:   1f 92           push    r1
 38e:   0f 92           push    r0
 390:   0f b6           in      r0, 0x3f        ; 63
 392:   0f 92           push    r0
 394:   11 24           eor     r1, r1
 396:   2f 93           push    r18
 398:   3f 93           push    r19
 39a:   4f 93           push    r20
 39c:   5f 93           push    r21
 39e:   6f 93           push    r22
 3a0:   7f 93           push    r23
 3a2:   8f 93           push    r24
 3a4:   9f 93           push    r25
 3a6:   af 93           push    r26
 3a8:   bf 93           push    r27
 3aa:   ef 93           push    r30
 3ac:   ff 93           push    r31
  Serial._tx_udr_empty_irq();
 3ae:   8f e1           ldi     r24, 0x1F       ; 31
 3b0:   91 e0           ldi     r25, 0x01       ; 1
 3b2:   0e 94 dd 00     call    0x1ba   ; 0x1ba <HardwareSerial::_tx_udr_empty_irq()>
}
 3b6:   ff 91           pop     r31
 3b8:   ef 91           pop     r30
 3ba:   bf 91           pop     r27
 3bc:   af 91           pop     r26
 3be:   9f 91           pop     r25
 3c0:   8f 91           pop     r24
 3c2:   7f 91           pop     r23
 3c4:   6f 91           pop     r22
 3c6:   5f 91           pop     r21
 3c8:   4f 91           pop     r20
 3ca:   3f 91           pop     r19
 3cc:   2f 91           pop     r18
 3ce:   0f 90           pop     r0
 3d0:   0f be           out     0x3f, r0        ; 63
 3d2:   0f 90           pop     r0
 3d4:   1f 90           pop     r1
 3d6:   18 95           reti

000003d8 <__vector_18>:
#elif defined(USART_RXC_vect)
  ISR(USART_RXC_vect) // ATmega8
#else
  #error "Don't know what the Data Received vector is called for Serial"
#endif
  {
 3d8:   1f 92           push    r1
 3da:   0f 92           push    r0
 3dc:   0f b6           in      r0, 0x3f        ; 63
 3de:   0f 92           push    r0
 3e0:   11 24           eor     r1, r1
 3e2:   2f 93           push    r18
 3e4:   8f 93           push    r24
 3e6:   9f 93           push    r25
 3e8:   ef 93           push    r30
 3ea:   ff 93           push    r31

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_rx_complete_irq(void)
{
  if (bit_is_clear(*_ucsra, UPE0)) {
 3ec:   e0 91 2f 01     lds     r30, 0x012F     ; 0x80012f <Serial+0x10>
 3f0:   f0 91 30 01     lds     r31, 0x0130     ; 0x800130 <Serial+0x11>
 3f4:   80 81           ld      r24, Z
 3f6:   e0 91 35 01     lds     r30, 0x0135     ; 0x800135 <Serial+0x16>
 3fa:   f0 91 36 01     lds     r31, 0x0136     ; 0x800136 <Serial+0x17>
 3fe:   82 fd           sbrc    r24, 2
 400:   1b c0           rjmp    .+54            ; 0x438 <__LOCK_REGION_LENGTH__+0x38>
    // No Parity error, read byte and store it in the buffer if there is
    // room
    unsigned char c = *_udr;
 402:   90 81           ld      r25, Z
    rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
 404:   80 91 38 01     lds     r24, 0x0138     ; 0x800138 <Serial+0x19>
 408:   8f 5f           subi    r24, 0xFF       ; 255
 40a:   8f 73           andi    r24, 0x3F       ; 63

    // if we should be storing the received character into the location
    // just before the tail (meaning that the head would advance to the
    // current location of the tail), we're about to overflow the buffer
    // and so we don't write the character or advance the head.
    if (i != _rx_buffer_tail) {
 40c:   20 91 39 01     lds     r18, 0x0139     ; 0x800139 <Serial+0x1a>
 410:   82 17           cp      r24, r18
 412:   41 f0           breq    .+16            ; 0x424 <__LOCK_REGION_LENGTH__+0x24>
      _rx_buffer[_rx_buffer_head] = c;
 414:   e0 91 38 01     lds     r30, 0x0138     ; 0x800138 <Serial+0x19>
 418:   f0 e0           ldi     r31, 0x00       ; 0
 41a:   e1 5e           subi    r30, 0xE1       ; 225
 41c:   fe 4f           sbci    r31, 0xFE       ; 254
 41e:   95 8f           std     Z+29, r25       ; 0x1d
      _rx_buffer_head = i;
 420:   80 93 38 01     sts     0x0138, r24     ; 0x800138 <Serial+0x19>
    Serial._rx_complete_irq();
  }
 424:   ff 91           pop     r31
 426:   ef 91           pop     r30
 428:   9f 91           pop     r25
 42a:   8f 91           pop     r24
 42c:   2f 91           pop     r18
 42e:   0f 90           pop     r0
 430:   0f be           out     0x3f, r0        ; 63
 432:   0f 90           pop     r0
 434:   1f 90           pop     r1
 436:   18 95           reti
    }
  } else {
    // Parity error, read byte but discard it
    *_udr;
 438:   80 81           ld      r24, Z
 43a:   f4 cf           rjmp    .-24            ; 0x424 <__LOCK_REGION_LENGTH__+0x24>

0000043c <__vector_16>:
#if defined(TIM0_OVF_vect)
ISR(TIM0_OVF_vect)
#else
ISR(TIMER0_OVF_vect)
#endif
{
 43c:   1f 92           push    r1
 43e:   0f 92           push    r0
 440:   0f b6           in      r0, 0x3f        ; 63
 442:   0f 92           push    r0
 444:   11 24           eor     r1, r1
 446:   2f 93           push    r18
 448:   3f 93           push    r19
 44a:   8f 93           push    r24
 44c:   9f 93           push    r25
 44e:   af 93           push    r26
 450:   bf 93           push    r27
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
 452:   80 91 17 01     lds     r24, 0x0117     ; 0x800117 <timer0_millis>
 456:   90 91 18 01     lds     r25, 0x0118     ; 0x800118 <timer0_millis+0x1>
 45a:   a0 91 19 01     lds     r26, 0x0119     ; 0x800119 <timer0_millis+0x2>
 45e:   b0 91 1a 01     lds     r27, 0x011A     ; 0x80011a <timer0_millis+0x3>
        unsigned char f = timer0_fract;
 462:   30 91 16 01     lds     r19, 0x0116     ; 0x800116 <__data_end>

        m += MILLIS_INC;
        f += FRACT_INC;
 466:   23 e0           ldi     r18, 0x03       ; 3
 468:   23 0f           add     r18, r19
        if (f >= FRACT_MAX) {
 46a:   2d 37           cpi     r18, 0x7D       ; 125
 46c:   58 f5           brcc    .+86            ; 0x4c4 <__vector_16+0x88>
        // copy these to local variables so they can be stored in registers
        // (volatile variables must be read from memory on every access)
        unsigned long m = timer0_millis;
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
 46e:   01 96           adiw    r24, 0x01       ; 1
 470:   a1 1d           adc     r26, r1
 472:   b1 1d           adc     r27, r1
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
                m += 1;
        }

        timer0_fract = f;
 474:   20 93 16 01     sts     0x0116, r18     ; 0x800116 <__data_end>
        timer0_millis = m;
 478:   80 93 17 01     sts     0x0117, r24     ; 0x800117 <timer0_millis>
 47c:   90 93 18 01     sts     0x0118, r25     ; 0x800118 <timer0_millis+0x1>
 480:   a0 93 19 01     sts     0x0119, r26     ; 0x800119 <timer0_millis+0x2>
 484:   b0 93 1a 01     sts     0x011A, r27     ; 0x80011a <timer0_millis+0x3>
        timer0_overflow_count++;
 488:   80 91 1b 01     lds     r24, 0x011B     ; 0x80011b <timer0_overflow_count>
 48c:   90 91 1c 01     lds     r25, 0x011C     ; 0x80011c <timer0_overflow_count+0x1>
 490:   a0 91 1d 01     lds     r26, 0x011D     ; 0x80011d <timer0_overflow_count+0x2>
 494:   b0 91 1e 01     lds     r27, 0x011E     ; 0x80011e <timer0_overflow_count+0x3>
 498:   01 96           adiw    r24, 0x01       ; 1
 49a:   a1 1d           adc     r26, r1
 49c:   b1 1d           adc     r27, r1
 49e:   80 93 1b 01     sts     0x011B, r24     ; 0x80011b <timer0_overflow_count>
 4a2:   90 93 1c 01     sts     0x011C, r25     ; 0x80011c <timer0_overflow_count+0x1>
 4a6:   a0 93 1d 01     sts     0x011D, r26     ; 0x80011d <timer0_overflow_count+0x2>
 4aa:   b0 93 1e 01     sts     0x011E, r27     ; 0x80011e <timer0_overflow_count+0x3>
}
 4ae:   bf 91           pop     r27
 4b0:   af 91           pop     r26
 4b2:   9f 91           pop     r25
 4b4:   8f 91           pop     r24
 4b6:   3f 91           pop     r19
 4b8:   2f 91           pop     r18
 4ba:   0f 90           pop     r0
 4bc:   0f be           out     0x3f, r0        ; 63
 4be:   0f 90           pop     r0
 4c0:   1f 90           pop     r1
 4c2:   18 95           reti
        unsigned char f = timer0_fract;

        m += MILLIS_INC;
        f += FRACT_INC;
        if (f >= FRACT_MAX) {
                f -= FRACT_MAX;
 4c4:   26 e8           ldi     r18, 0x86       ; 134
 4c6:   23 0f           add     r18, r19
                m += 1;
 4c8:   02 96           adiw    r24, 0x02       ; 2
 4ca:   a1 1d           adc     r26, r1
 4cc:   b1 1d           adc     r27, r1
 4ce:   d2 cf           rjmp    .-92            ; 0x474 <__vector_16+0x38>

000004d0 <main>:

void init()
{
        // this needs to be called before setup() or some functions won't
        // work there
        sei();
 4d0:   78 94           sei

        // on the ATmega168, timer 0 is also used for fast hardware pwm
        // (using phase-correct PWM would mean that timer 0 overflowed half as often
        // resulting in different millis() behavior on the ATmega8 and ATmega168)
#if defined(TCCR0A) && defined(WGM01)
        sbi(TCCR0A, WGM01);
 4d2:   84 b5           in      r24, 0x24       ; 36
 4d4:   82 60           ori     r24, 0x02       ; 2
 4d6:   84 bd           out     0x24, r24       ; 36
        sbi(TCCR0A, WGM00);
 4d8:   84 b5           in      r24, 0x24       ; 36
 4da:   81 60           ori     r24, 0x01       ; 1
 4dc:   84 bd           out     0x24, r24       ; 36
        // this combination is for the standard atmega8
        sbi(TCCR0, CS01);
        sbi(TCCR0, CS00);
#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
        // this combination is for the standard 168/328/1280/2560
        sbi(TCCR0B, CS01);
 4de:   85 b5           in      r24, 0x25       ; 37
 4e0:   82 60           ori     r24, 0x02       ; 2
 4e2:   85 bd           out     0x25, r24       ; 37
        sbi(TCCR0B, CS00);
 4e4:   85 b5           in      r24, 0x25       ; 37
 4e6:   81 60           ori     r24, 0x01       ; 1
 4e8:   85 bd           out     0x25, r24       ; 37

        // enable timer 0 overflow interrupt
#if defined(TIMSK) && defined(TOIE0)
        sbi(TIMSK, TOIE0);
#elif defined(TIMSK0) && defined(TOIE0)
        sbi(TIMSK0, TOIE0);
 4ea:   80 91 6e 00     lds     r24, 0x006E     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
 4ee:   81 60           ori     r24, 0x01       ; 1
 4f0:   80 93 6e 00     sts     0x006E, r24     ; 0x80006e <__DATA_REGION_ORIGIN__+0xe>
        // this is better for motors as it ensures an even waveform
        // note, however, that fast pwm mode can achieve a frequency of up
        // 8 MHz (with a 16 MHz clock) at 50% duty cycle

#if defined(TCCR1B) && defined(CS11) && defined(CS10)
        TCCR1B = 0;
 4f4:   10 92 81 00     sts     0x0081, r1      ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>

        // set timer 1 prescale factor to 64
        sbi(TCCR1B, CS11);
 4f8:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 4fc:   82 60           ori     r24, 0x02       ; 2
 4fe:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
#if F_CPU >= 8000000L
        sbi(TCCR1B, CS10);
 502:   80 91 81 00     lds     r24, 0x0081     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
 506:   81 60           ori     r24, 0x01       ; 1
 508:   80 93 81 00     sts     0x0081, r24     ; 0x800081 <__DATA_REGION_ORIGIN__+0x21>
        sbi(TCCR1, CS10);
#endif
#endif
        // put timer 1 in 8-bit phase correct pwm mode
#if defined(TCCR1A) && defined(WGM10)
        sbi(TCCR1A, WGM10);
 50c:   80 91 80 00     lds     r24, 0x0080     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>
 510:   81 60           ori     r24, 0x01       ; 1
 512:   80 93 80 00     sts     0x0080, r24     ; 0x800080 <__DATA_REGION_ORIGIN__+0x20>

        // set timer 2 prescale factor to 64
#if defined(TCCR2) && defined(CS22)
        sbi(TCCR2, CS22);
#elif defined(TCCR2B) && defined(CS22)
        sbi(TCCR2B, CS22);
 516:   80 91 b1 00     lds     r24, 0x00B1     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>
 51a:   84 60           ori     r24, 0x04       ; 4
 51c:   80 93 b1 00     sts     0x00B1, r24     ; 0x8000b1 <__DATA_REGION_ORIGIN__+0x51>

        // configure timer 2 for phase correct pwm (8-bit)
#if defined(TCCR2) && defined(WGM20)
        sbi(TCCR2, WGM20);
#elif defined(TCCR2A) && defined(WGM20)
        sbi(TCCR2A, WGM20);
 520:   80 91 b0 00     lds     r24, 0x00B0     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
 524:   81 60           ori     r24, 0x01       ; 1
 526:   80 93 b0 00     sts     0x00B0, r24     ; 0x8000b0 <__DATA_REGION_ORIGIN__+0x50>
#endif

#if defined(ADCSRA)
        // set a2d prescaler so we are inside the desired 50-200 KHz range.
        #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
                sbi(ADCSRA, ADPS2);
 52a:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 52e:   84 60           ori     r24, 0x04       ; 4
 530:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS1);
 534:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 538:   82 60           ori     r24, 0x02       ; 2
 53a:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                sbi(ADCSRA, ADPS0);
 53e:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 542:   81 60           ori     r24, 0x01       ; 1
 544:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
                cbi(ADCSRA, ADPS2);
                cbi(ADCSRA, ADPS1);
                sbi(ADCSRA, ADPS0);
        #endif
        // enable a2d conversions
        sbi(ADCSRA, ADEN);
 548:   80 91 7a 00     lds     r24, 0x007A     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
 54c:   80 68           ori     r24, 0x80       ; 128
 54e:   80 93 7a 00     sts     0x007A, r24     ; 0x80007a <__DATA_REGION_ORIGIN__+0x1a>
        // here so they can be used as normal digital i/o; they will be
        // reconnected in Serial.begin()
#if defined(UCSRB)
        UCSRB = 0;
#elif defined(UCSR0B)
        UCSR0B = 0;
 552:   10 92 c1 00     sts     0x00C1, r1      ; 0x8000c1 <__DATA_REGION_ORIGIN__+0x61>
 556:   8f ef           ldi     r24, 0xFF       ; 255
 558:   84 b9           out     0x04, r24       ; 4
 55a:   1a b8           out     0x0a, r1        ; 10
 55c:   80 e8           ldi     r24, 0x80       ; 128
 55e:   8b b9           out     0x0b, r24       ; 11
 560:   4f 99           sbic    0x09, 7 ; 9
 562:   fe cf           rjmp    .-4             ; 0x560 <main+0x90>
 564:   8f ef           ldi     r24, 0xFF       ; 255
 566:   85 b9           out     0x05, r24       ; 5
 568:   15 b8           out     0x05, r1        ; 5
 56a:   85 b9           out     0x05, r24       ; 5
 56c:   15 b8           out     0x05, r1        ; 5
 56e:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 572:   4f 9b           sbis    0x09, 7 ; 9
 574:   fe cf           rjmp    .-4             ; 0x572 <main+0xa2>
 576:   4f 99           sbic    0x09, 7 ; 9
 578:   fe cf           rjmp    .-4             ; 0x576 <main+0xa6>
 57a:   8f ef           ldi     r24, 0xFF       ; 255
 57c:   85 b9           out     0x05, r24       ; 5
 57e:   15 b8           out     0x05, r1        ; 5
 580:   85 b9           out     0x05, r24       ; 5
 582:   15 b8           out     0x05, r1        ; 5
 584:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 588:   4f 9b           sbis    0x09, 7 ; 9
 58a:   fe cf           rjmp    .-4             ; 0x588 <main+0xb8>
 58c:   4f 99           sbic    0x09, 7 ; 9
 58e:   fe cf           rjmp    .-4             ; 0x58c <main+0xbc>
 590:   8f ef           ldi     r24, 0xFF       ; 255
 592:   85 b9           out     0x05, r24       ; 5
 594:   15 b8           out     0x05, r1        ; 5
 596:   85 b9           out     0x05, r24       ; 5
 598:   15 b8           out     0x05, r1        ; 5
 59a:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 59e:   4f 9b           sbis    0x09, 7 ; 9
 5a0:   fe cf           rjmp    .-4             ; 0x59e <main+0xce>
 5a2:   4f 99           sbic    0x09, 7 ; 9
 5a4:   fe cf           rjmp    .-4             ; 0x5a2 <main+0xd2>
 5a6:   8f ef           ldi     r24, 0xFF       ; 255
 5a8:   85 b9           out     0x05, r24       ; 5
 5aa:   15 b8           out     0x05, r1        ; 5
 5ac:   85 b9           out     0x05, r24       ; 5
 5ae:   15 b8           out     0x05, r1        ; 5
 5b0:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 5b4:   4f 9b           sbis    0x09, 7 ; 9
 5b6:   fe cf           rjmp    .-4             ; 0x5b4 <main+0xe4>
 5b8:   4f 99           sbic    0x09, 7 ; 9
 5ba:   fe cf           rjmp    .-4             ; 0x5b8 <main+0xe8>
 5bc:   8f ef           ldi     r24, 0xFF       ; 255
 5be:   85 b9           out     0x05, r24       ; 5
 5c0:   15 b8           out     0x05, r1        ; 5
 5c2:   85 b9           out     0x05, r24       ; 5
 5c4:   15 b8           out     0x05, r1        ; 5
 5c6:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 5ca:   4f 9b           sbis    0x09, 7 ; 9
 5cc:   fe cf           rjmp    .-4             ; 0x5ca <main+0xfa>
 5ce:   4f 99           sbic    0x09, 7 ; 9
 5d0:   fe cf           rjmp    .-4             ; 0x5ce <main+0xfe>
 5d2:   8f ef           ldi     r24, 0xFF       ; 255
 5d4:   85 b9           out     0x05, r24       ; 5
 5d6:   15 b8           out     0x05, r1        ; 5
 5d8:   85 b9           out     0x05, r24       ; 5
 5da:   15 b8           out     0x05, r1        ; 5
 5dc:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 5e0:   4f 9b           sbis    0x09, 7 ; 9
 5e2:   fe cf           rjmp    .-4             ; 0x5e0 <main+0x110>
 5e4:   4f 99           sbic    0x09, 7 ; 9
 5e6:   fe cf           rjmp    .-4             ; 0x5e4 <main+0x114>
 5e8:   8f ef           ldi     r24, 0xFF       ; 255
 5ea:   85 b9           out     0x05, r24       ; 5
 5ec:   15 b8           out     0x05, r1        ; 5
 5ee:   85 b9           out     0x05, r24       ; 5
 5f0:   15 b8           out     0x05, r1        ; 5
 5f2:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 5f6:   4f 9b           sbis    0x09, 7 ; 9
 5f8:   fe cf           rjmp    .-4             ; 0x5f6 <main+0x126>
 5fa:   4f 99           sbic    0x09, 7 ; 9
 5fc:   fe cf           rjmp    .-4             ; 0x5fa <main+0x12a>
 5fe:   8f ef           ldi     r24, 0xFF       ; 255
 600:   85 b9           out     0x05, r24       ; 5
 602:   15 b8           out     0x05, r1        ; 5
 604:   85 b9           out     0x05, r24       ; 5
 606:   15 b8           out     0x05, r1        ; 5
 608:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 60c:   4f 9b           sbis    0x09, 7 ; 9
 60e:   fe cf           rjmp    .-4             ; 0x60c <main+0x13c>
 610:   4f 99           sbic    0x09, 7 ; 9
 612:   fe cf           rjmp    .-4             ; 0x610 <main+0x140>
 614:   8f ef           ldi     r24, 0xFF       ; 255
 616:   85 b9           out     0x05, r24       ; 5
 618:   15 b8           out     0x05, r1        ; 5
 61a:   85 b9           out     0x05, r24       ; 5
 61c:   15 b8           out     0x05, r1        ; 5
 61e:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 622:   4f 9b           sbis    0x09, 7 ; 9
 624:   fe cf           rjmp    .-4             ; 0x622 <main+0x152>
 626:   4f 99           sbic    0x09, 7 ; 9
 628:   fe cf           rjmp    .-4             ; 0x626 <main+0x156>
 62a:   8f ef           ldi     r24, 0xFF       ; 255
 62c:   85 b9           out     0x05, r24       ; 5
 62e:   15 b8           out     0x05, r1        ; 5
 630:   85 b9           out     0x05, r24       ; 5
 632:   15 b8           out     0x05, r1        ; 5
 634:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 638:   4f 9b           sbis    0x09, 7 ; 9
 63a:   fe cf           rjmp    .-4             ; 0x638 <main+0x168>
 63c:   4f 99           sbic    0x09, 7 ; 9
 63e:   fe cf           rjmp    .-4             ; 0x63c <main+0x16c>
 640:   8f ef           ldi     r24, 0xFF       ; 255
 642:   85 b9           out     0x05, r24       ; 5
 644:   15 b8           out     0x05, r1        ; 5
 646:   85 b9           out     0x05, r24       ; 5
 648:   15 b8           out     0x05, r1        ; 5
 64a:   0e 94 91 01     call    0x322   ; 0x322 <delay.constprop.3>
 64e:   4f 9b           sbis    0x09, 7 ; 9
 650:   fe cf           rjmp    .-4             ; 0x64e <main+0x17e>
 652:   4f 99           sbic    0x09, 7 ; 9
 654:   fe cf           rjmp    .-4             ; 0x652 <main+0x182>
 656:   8f ef           ldi     r24, 0xFF       ; 255
 658:   85 b9           out     0x05, r24       ; 5
 65a:   15 b8           out     0x05, r1        ; 5
 65c:   85 b9           out     0x05, r24       ; 5
 65e:   15 b8           out     0x05, r1        ; 5

void HardwareSerial::begin(unsigned long baud, byte config)
{
  // Try u2x mode first
  uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
  *_ucsra = 1 << U2X0;
 660:   e0 91 2f 01     lds     r30, 0x012F     ; 0x80012f <Serial+0x10>
 664:   f0 91 30 01     lds     r31, 0x0130     ; 0x800130 <Serial+0x11>
 668:   82 e0           ldi     r24, 0x02       ; 2
 66a:   80 83           st      Z, r24
  // on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
  // be > 4095, so switch back to non-u2x mode if the baud rate is too
  // low.
  if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
  {
    *_ucsra = 0;
 66c:   e0 91 2f 01     lds     r30, 0x012F     ; 0x80012f <Serial+0x10>
 670:   f0 91 30 01     lds     r31, 0x0130     ; 0x800130 <Serial+0x11>
 674:   10 82           st      Z, r1
    baud_setting = (F_CPU / 8 / baud - 1) / 2;
  }

  // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
  *_ubrrh = baud_setting >> 8;
 676:   e0 91 2b 01     lds     r30, 0x012B     ; 0x80012b <Serial+0xc>
 67a:   f0 91 2c 01     lds     r31, 0x012C     ; 0x80012c <Serial+0xd>
 67e:   8d e0           ldi     r24, 0x0D       ; 13
 680:   80 83           st      Z, r24
  *_ubrrl = baud_setting;
 682:   e0 91 2d 01     lds     r30, 0x012D     ; 0x80012d <Serial+0xe>
 686:   f0 91 2e 01     lds     r31, 0x012E     ; 0x80012e <Serial+0xf>
 68a:   84 e0           ldi     r24, 0x04       ; 4
 68c:   80 83           st      Z, r24

  _written = false;
 68e:   10 92 37 01     sts     0x0137, r1      ; 0x800137 <Serial+0x18>

  //set the data bits, parity, and stop bits
#if defined(__AVR_ATmega8__)
  config |= 0x80; // select UCSRC register (shared with UBRRH)
#endif
  *_ucsrc = config;
 692:   e0 91 33 01     lds     r30, 0x0133     ; 0x800133 <Serial+0x14>
 696:   f0 91 34 01     lds     r31, 0x0134     ; 0x800134 <Serial+0x15>
 69a:   86 e0           ldi     r24, 0x06       ; 6
 69c:   80 83           st      Z, r24

  sbi(*_ucsrb, RXEN0);
 69e:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 6a2:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 6a6:   80 81           ld      r24, Z
 6a8:   80 61           ori     r24, 0x10       ; 16
 6aa:   80 83           st      Z, r24
  sbi(*_ucsrb, TXEN0);
 6ac:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 6b0:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 6b4:   80 81           ld      r24, Z
 6b6:   88 60           ori     r24, 0x08       ; 8
 6b8:   80 83           st      Z, r24
  sbi(*_ucsrb, RXCIE0);
 6ba:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 6be:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 6c2:   80 81           ld      r24, Z
 6c4:   80 68           ori     r24, 0x80       ; 128
 6c6:   80 83           st      Z, r24
  cbi(*_ucsrb, UDRIE0);
 6c8:   e0 91 31 01     lds     r30, 0x0131     ; 0x800131 <Serial+0x12>
 6cc:   f0 91 32 01     lds     r31, 0x0132     ; 0x800132 <Serial+0x13>
 6d0:   80 81           ld      r24, Z
 6d2:   8f 7d           andi    r24, 0xDF       ; 223
 6d4:   80 83           st      Z, r24
    void clearWriteError() { setWriteError(0); }

    virtual size_t write(uint8_t) = 0;
    size_t write(const char *str) {
      if (str == NULL) return 0;
      return write((const uint8_t *)str, strlen(str));
 6d6:   42 e0           ldi     r20, 0x02       ; 2
 6d8:   50 e0           ldi     r21, 0x00       ; 0
 6da:   62 e1           ldi     r22, 0x12       ; 18
 6dc:   71 e0           ldi     r23, 0x01       ; 1
 6de:   8f e1           ldi     r24, 0x1F       ; 31
 6e0:   91 e0           ldi     r25, 0x01       ; 1
 6e2:   0e 94 5f 00     call    0xbe    ; 0xbe <Print::write(unsigned char const*, unsigned int)>
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 6e6:   c0 e0           ldi     r28, 0x00       ; 0
 6e8:   d0 e0           ldi     r29, 0x00       ; 0
 6ea:   20 97           sbiw    r28, 0x00       ; 0
 6ec:   f1 f3           breq    .-4             ; 0x6ea <main+0x21a>
 6ee:   0e 94 c9 00     call    0x192   ; 0x192 <Serial0_available()>
 6f2:   88 23           and     r24, r24
 6f4:   d1 f3           breq    .-12            ; 0x6ea <main+0x21a>
 6f6:   0e 94 00 00     call    0       ; 0x0 <__vectors>
 6fa:   f7 cf           rjmp    .-18            ; 0x6ea <main+0x21a>

000006fc <_GLOBAL__sub_I___vector_18>:
    size_t printNumber(unsigned long, uint8_t);
    size_t printFloat(double, uint8_t);
  protected:
    void setWriteError(int err = 1) { write_error = err; }
  public:
    Print() : write_error(0) {}
 6fc:   ef e1           ldi     r30, 0x1F       ; 31
 6fe:   f1 e0           ldi     r31, 0x01       ; 1
 700:   13 82           std     Z+3, r1 ; 0x03
 702:   12 82           std     Z+2, r1 ; 0x02
  public:
    virtual int available() = 0;
    virtual int read() = 0;
    virtual int peek() = 0;

    Stream() {_timeout=1000;}
 704:   88 ee           ldi     r24, 0xE8       ; 232
 706:   93 e0           ldi     r25, 0x03       ; 3
 708:   a0 e0           ldi     r26, 0x00       ; 0
 70a:   b0 e0           ldi     r27, 0x00       ; 0
 70c:   84 83           std     Z+4, r24        ; 0x04
 70e:   95 83           std     Z+5, r25        ; 0x05
 710:   a6 83           std     Z+6, r26        ; 0x06
 712:   b7 83           std     Z+7, r27        ; 0x07
  volatile uint8_t *ucsrc, volatile uint8_t *udr) :
    _ubrrh(ubrrh), _ubrrl(ubrrl),
    _ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
    _udr(udr),
    _rx_buffer_head(0), _rx_buffer_tail(0),
    _tx_buffer_head(0), _tx_buffer_tail(0)
 714:   84 e0           ldi     r24, 0x04       ; 4
 716:   91 e0           ldi     r25, 0x01       ; 1
 718:   91 83           std     Z+1, r25        ; 0x01
 71a:   80 83           st      Z, r24
 71c:   85 ec           ldi     r24, 0xC5       ; 197
 71e:   90 e0           ldi     r25, 0x00       ; 0
 720:   95 87           std     Z+13, r25       ; 0x0d
 722:   84 87           std     Z+12, r24       ; 0x0c
 724:   84 ec           ldi     r24, 0xC4       ; 196
 726:   90 e0           ldi     r25, 0x00       ; 0
 728:   97 87           std     Z+15, r25       ; 0x0f
 72a:   86 87           std     Z+14, r24       ; 0x0e
 72c:   80 ec           ldi     r24, 0xC0       ; 192
 72e:   90 e0           ldi     r25, 0x00       ; 0
 730:   91 8b           std     Z+17, r25       ; 0x11
 732:   80 8b           std     Z+16, r24       ; 0x10
 734:   81 ec           ldi     r24, 0xC1       ; 193
 736:   90 e0           ldi     r25, 0x00       ; 0
 738:   93 8b           std     Z+19, r25       ; 0x13
 73a:   82 8b           std     Z+18, r24       ; 0x12
 73c:   82 ec           ldi     r24, 0xC2       ; 194
 73e:   90 e0           ldi     r25, 0x00       ; 0
 740:   95 8b           std     Z+21, r25       ; 0x15
 742:   84 8b           std     Z+20, r24       ; 0x14
 744:   86 ec           ldi     r24, 0xC6       ; 198
 746:   90 e0           ldi     r25, 0x00       ; 0
 748:   97 8b           std     Z+23, r25       ; 0x17
 74a:   86 8b           std     Z+22, r24       ; 0x16
 74c:   11 8e           std     Z+25, r1        ; 0x19
 74e:   12 8e           std     Z+26, r1        ; 0x1a
 750:   13 8e           std     Z+27, r1        ; 0x1b
 752:   14 8e           std     Z+28, r1        ; 0x1c

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
}
 754:   08 95           ret

00000756 <__tablejump2__>:
 756:   ee 0f           add     r30, r30
 758:   ff 1f           adc     r31, r31
 75a:   05 90           lpm     r0, Z+
 75c:   f4 91           lpm     r31, Z
 75e:   e0 2d           mov     r30, r0
 760:   09 94           ijmp

00000762 <_exit>:
 762:   f8 94           cli

00000764 <__stop_program>:
 764:   ff cf           rjmp    .-2             ; 0x764 <__stop_program>

This is because main.cpp is the actual main function of your sketch.

This piece of code (included in the Arduino core) calls the setup() and loop() functions you see in your sketch.

[edit]

You actually see this in the included comments:

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