SPI and Shift Register

Hey All,

I am hoping you guys can confirm something for me or let me know if I will run into problems that you may know of from experience with this setup.

I have about 30 shift registers I need to control and they are broken up into groups of ten as they service different things.

My idea is to connect all 30 shift registers to the Same SCK pin and have the first 3 of the group of ten connected to the same MOSI. Then I would have each group of ten connected to its own dedicated latch pin.

Shift Registers 1-10 are in serial, 11-20 are in serial and 21 - 30 are in serial.

Essentially it would look like

SCK - Connects to all Shift Registers

MOSI - Connects to Shift Register 1, 11, and 21

SS1 - Connects to shift Registers 1-10 latch

SS2 - Connects to shift Registers 11-20 latch

SS3 - Connects to shift Registers 21-30 latch

If I am understanding it correctly, so long as I don't pull the latches low on Latch 2 and Latch 3 while I am trying to write to Latch 1, their would be no problem with the MOSI and SCK affecting those shift registers? Because technically MOSI and SCK are still connected to them while they are writing data to the first group of shift registers.

Thanks,
Phil

Hi Phil, sounds like you are a little confused.

MOSI would only connect to the first shift register. The "data out" pin of the first shift register connects to the"data in" pin of the second and so on for as many shift registers as you like. The SCK and SS pins connect to all shift registers in parallel and here is the problem. The Arduino pins for SCK and SS can only connect to maybe 10 to 20 shift registers. More than that and the signal becomes degraded and the data cannot pass reliably. So you need some "buffer" chips to relay the signals.

I realize what you mean concerning the data out goes into the data in of the second and so on. Which is why Shift Registers 1-10 are in that configuration described, 11-20 and 21 to 30. My goal was to have those 3 different sections of shift registers addressed individually via the SS pin by pulling the latch low on the section of shift registers I want to write too. Which is why I was wondering if Shift registers 11-20 and 21 to 30 for example would be affected if I am trying to write to shift registers 1-10 so long as I keep their latches high?

My reason for splitting it up like this is because since they serve different functions if one section breaks or loses connection due to use, the other sections (which handle different tasks) will continue to work unaffected. This wouldn't work if they were all in series as one malfunction down the line would affect the rest.

If I split them into groups like mentioned before would that not fix that issue of signal degradation since it will only be going through 10 shift registers at a time right?

The latch pin just prevents the output of the shift register going to the outputs, it does not prevent the shift register from working inside. So you can not disable shift registers like you think you can.

If I split them into groups like mentioned before would that not fix that issue of signal degradation since it will only be going through 10 shift registers at a time right?

No it wouldn’t. Signal going through a shift register is reconstituted at each stage it is not degraded at all. What degrades a signal is being connected to lots of inputs like the clock signal, that is cured by buffering in groups of ten or so.

That means the Arduino output goes to say the input of five buffers. Then each buffer output can connect to ten other inputs.

Ok, I think I understand.

The 3 groups of 10 shift registers, each with its own SS line (the lines connected to 3 Arduino pins) would fix the signal problem for the SS line because each Arduino pin would only be connected to 10 inputs. But the problem would still remain for the Arduino CLK pin which would be connected to 30 inputs. That line would need buffering. BTW, this problem is known as a "fan out" problem because the lines looks like a fan when drawn on a schematic.

If you use 3 Arduino pins as CLK pins, you would fix that problem too. Each would have a fan out of 10. But then you could not use the hardware SPI. You would need to use the shiftOut() function, which is much slower. This may not be a problem for your project, depending what speed is required and what else the Arduino is doing.

As Mike said, the MOSI/DATA line is not a problem. It would only be connected to 3 inputs, the first of each group of SRs. That is only a fan out of 3, so no problem. And for the other 9 SRs in the group, the signal is buffered by the previous SR, so that's ok too.

Not to be a nag but, since it wasn't mentioned, don't forget to place a .1µF decoupling cap. at each IC.

PaulRB:
If you use 3 Arduino pins as CLK pins, you would fix that problem too. Each would have a fan out of 10. But then you could not use the hardware SPI. You would need to use the shiftOut() function, which is much slower. This may not be a problem for your project, depending what speed is required and what else the Arduino is doing.

That got me thinking. You could run SCK to say, the enable of a (74LS138) 1-of-8 decoder and use two Arduino pins to drive the address select of the decoder. The decoder would give you the fanout and you could clock each bank of SRs independently and still utilize SPI.

Possible?

Thanks for all the feedback!

So as you guys are saying its looking like all I need is about 3 buffer chips on the CLK pin for this to work. Would this simple one work? Simply tying all the OE to VCC permanently should achieve a good buffer and then branch each of the 4 outputs to a group of SR's right? http://www.onsemi.com/pub/Collateral/MC74HC125A-D.PDF)

Also thanks dougp for reminding me about the decoupling cap. Won't forget to add it in!

Grumpy_Mike I realize that it never stopped the shift register from working, my idea was to give it the "illusion" that it is separated into 3 groups my engaging and disengaging the latch of the ones I want to update even though I was technically sending data out to them all. I was wondering if doing so might cause problems that I didn't know about that would affect performance, which it appears is the signal degradation for connecting too many to the same CLK signal.

dougp:
That got me thinking. You could run SCK to say, the enable of a (74LS138) 1-of-8 decoder and use two Arduino pins to drive the address select of the decoder. The decoder would give you the fanout and you could clock each bank of SRs independently and still utilize SPI.

Possible?

Maybe, but over-complicated and needs two more Arduino pins. Just buffer the CLK line enough for 30 chips.

74hc125 should be fine. Or just use 74hc04 (those are inverting, so use them in pairs).