I realize what you mean concerning the data out goes into the data in of the second and so on. Which is why Shift Registers 1-10 are in that configuration described, 11-20 and 21 to 30. My goal was to have those 3 different sections of shift registers addressed individually via the SS pin by pulling the latch low on the section of shift registers I want to write too. Which is why I was wondering if Shift registers 11-20 and 21 to 30 for example would be affected if I am trying to write to shift registers 1-10 so long as I keep their latches high?
My reason for splitting it up like this is because since they serve different functions if one section breaks or loses connection due to use, the other sections (which handle different tasks) will continue to work unaffected. This wouldn't work if they were all in series as one malfunction down the line would affect the rest.
If I split them into groups like mentioned before would that not fix that issue of signal degradation since it will only be going through 10 shift registers at a time right?