Hi all, I just want to know how we can interpret the interrupt status register of SPI in SAMx3 series.
The question is, if I don't have a slave connected to the master(which is the arduino), the data transmission won't be successful obviously. I've already gone through the data sheet to read about the interrupt status register and didn't get anything out of it. All the time, whenever there's a transmission, the SPI interrupt status register(0x40008010) reads the value 0x10202.
To give more clarity, the project which I'm working on requires, needs to know the when the SPI data transmission from master to slave is failing and requires to trigger an external interrupt, at such situations to process further.
The SPI hardware has no way to tell that the transmission has been successful - all it knows is that it has clocked-in/out the required number of bits.
If you want to confirm that the Slave correctly received, then you will have to implement some sort of confirmation protocol...
Simple trick is to use a checksum, the receiver generates a checksum and returns that when the data is received. You will need to send an extra byte(s) depending on checksum size and have the target return the checksum. Both ends can check it at that point. The target will also need to know how many bytes it is to expect. Basically that is a simple protocol.
In the Spi.Transfer() library API, there’s a return value coming for each byte transfer. Can we use it at any sort to check the transmission is successful or failure?
Not really. SPI transfers a bit to the slave and at the same time receives a bit from the slave. This happens on the same clock edge. To receive something from a slave something has to be transmitted to it, doesn't matter what, it needs the clock signals to shift data to the master. SPI is nothing more then an intelligent shift register set.
Not necessary, it is up to you and your software to ignore or use this information. This is built into the hardware so you cannot stop the slave from sending data back. If you do not want anything just dont connect that signal. SPI was introduced somewhere around 1985 by Motorola who in turn implemented it in a lot of there microprocessors such as the O5 and 11 families. This was an economical way to add I/O to a microprocessor without breaking the bank by using standard logic chips. Here is a link to help you: Serial Peripheral Interface (SPI) - SparkFun Learn It started with MISO and MOSI, I have used those terms since about 1985 and am not about to change now.
When an 8-bit data arrives into SPDR Register of Slave NANO, the SPIF-bit/flag of SPSR Register becomes HIGH. If interrupt logic is enabled, then this flag will interrupt the MCU. Can this event (SPIF flag/ISR()) be taken as data arrival confirmation?
Master will have no clue when the slave is going to be unavailable(the slave will be in MCU sleep state where no power will be given to the peripheral support). That’s the reason why we are in search for a mechanism to know, by looking at the master end for the transmission status.
The SPDR Registers of Master UNO and Slave NANO are back-to-back connected (Fig-1). At the end of transmission cycle, the content of Slave's SPDR Register enters into Master's SPDR Register; as a result, the SPIF-bit/flag of Master's SPSR Register becomes HIGH (Fig-1) and this bit/flag can be polled by Master to know the end of transmission. Correct?
As I had understood from the Title of the thread and the following quote from OP's post #1, he (OP) was asking on the integrity of data transmission and not the data valdity.
I'm not sure what the distinction between "integrity" and "validity" is there?
But the SPI hardware tells neither: it just clocks bits in & out - it cannot tell anything about their meaning or validity or "integrity" or anything else.
Just the same as a UART: when you send stuff out of a UART (eg, using Serial) there is no* way to tell whether anything was actually connected to receive that data.
* Other than hardware handshaking, or some protocol reply
