SPI-Sampling phase at MISO, Arduino due

Hello everybody,

I am using Arduino due for my application. My application is like arduino will send the data byte to the set of seriously connected shift registers(output of one register is connected to input of next register) through MOSI(which is connected to the input of the first register) and get the same data at MISO which is connected to the output of the last register. SCLK is given to all the shift register as clock source.

My problem is, while reading the data at MISO, am not getting the expected value and there is shift in one bit. i found this shift due to sampling the incoming data from second clock by SPI module which is its nature. For example if it sample at leading edge and clock polarity 0, its not sampling in first leading edge, instead it is sampling in second leading edge which result in a shift of one bit.

Is there any way to change this in SPI library, so that it samples in first clock itself.
Could anyone please help me regarding this.

Why are you starting another Thread with this problem?

I already replied to your other Thread.

I will suggest to the Moderator to lock this Thread.

...R

i couldnt find my post under Networking, Protocols, and Devices topic. so i thought it was deleted somehow. So only i started the new thread.

ParthibanV:
i couldnt find my post under Networking, Protocols, and Devices topic. so i thought it was deleted somehow. So only i started the new thread.

You couldn't find the post marked "MOVED: SPI Reading issue at MISO in Arduino due" (which oddly enough, was the exact title you gave the thread, apart from the word "MOVED")?