Static sensitivity of unmounted processors

I recently got a batch of atmega328-Au and chips that were packaged in a suboptimal way. I have a limited window in which to make a complaint and won’t be able to install/check each chip in that time.

How sensitive is the processor? Am I likely to have problems?

I’ve received small orders before in portions on the proper trays, so this is a new one to me.

Ideally, I’d like to have something definitive I can reference if I’m going to be making a claim against the seller.

Thanks

I recently got a batch of atmega328-Au and chips that were packaged in a suboptimal way. I have a limited window in which to make a complaint and won’t be able to install/check each chip in that time.

How sensitive is the processor? Am I likely to have problems?

I’ve received small orders before in portions on the proper trays, so this is a new one to me.

I’d upload a couple of pics from my phone, but iOS doesn’t save as jpg anymore - anyone know how to easily convert??

Ideally, I’d like to have something definitive I can reference if I’m going to be making a claim against the seller.

Thanks

The problem with ESD is that it's a slow killer. It can take months for damage to get to the point where e.g. IO pins no longer work.

If you can measure input leakage accurately and compare it to a) the spec and b) a sample of the previous batch that you received, you might be able to judge the quality.

I have no idea what you call "sub standard".

I'm not too careful with my boards from an ESD perspective and have not had problems.

Duplicate topics merged

Hi,

I've been playing around with all sorts of 'chips' over several decades and I've not used anti-static mats / straps, etc, as often as I should have done...

but I can't say that I've ever found that I've 'blown' a chip.

They've all seemed to work as I expected them to.

Some years back I attended an ESD training course at work and they reckon it's possible to static zap a resistor. Has anyone actually ever done that? I'm pretty sure that I haven't.

Peter

I work with bare chips all the time, often with no anti-static countermeasures and have never had a failure that appeared to be caused by ESD.

It was a real problem in the past, but manufacturers have gotten much better at making parts resist damage from ESD.

There is that situation with experienced techs, who have an awareness of anti-static methods...

They just tend to work unconsciously in a way that minimises ESD risk.
Not that they go out of their way, but they’ve set themselves and their workspaces up in such a way that the risk is minimised.

Curious about how you think I have unconsciously set up my workspace to minimize static risks, in terms of things to think about. Other than the fact that I don't have carpet (which I hate for personal reasons anyway), I can't think of anything off the top of my head.

Curious about how you think I have unconsciously set up my workspace to minimize static risks, in terms of things to think about.

Just little habits and behaviours... e.g. I unconsciously tap the desktop next to a chip before I pick it up - to dissipate any static before it hits the chip. Desktop/workspaces tend to be timber or metal surfaces that won't hold a charge. Nothing too complicated - we modify our world slightly to support our expectations and leaning toward best practice.
Connect 0V/Ground leads before the supply rails... and so on.
(I really had to think about those ! They're habit.)