Can anyone tell me what time delay is represented in the following code for a couple of delays, written for Arduino Nano so I assume 16Mhz clk?
delay_us
LDI R21, 255
15: DEC R21
BRNE_15
RET
;-----------------------------------
delay_ms:
LDI R21, 255
17: LDI R22, 255
18: LDI R23, 20
19: DEC R23
BRNE 19
DEC R22
BRNE 18
DEC R21
BRNE 17
RET
**;=======================================================
I do not know the number of clock cycles for every command (maybe the ATmega328P datasheet has it) but most are "one cycle" at 62.5ns per cycle...
;--------------- ; cycles -------------
LDI R21, 255 ; 1
15: DEC R21 ; (1 + 255)
BRNE_15 ; 2 (1 if not branching)
RET ; 1
;-----------------------------------
delay_ms:
LDI R21, 255 ; 1
17: LDI R22, 255 ; 1
18: LDI R23, 20 ; 1
19: DEC R23 ; (1 + 20) *
BRNE 19 ; 2 (1 if not branching)
DEC R22 ; (1 + 255) *
BRNE 18 ; 2 (1 if not branching)
DEC R21 ; (1 + 255) = 1,376,256
BRNE 17 ; 2 (1 if not branching)
RET ; 1
;-----------------------------------
ATmega328P_assembly_instructions.pdf (65.9 KB)
Homework assignment?
Need to pgm for different clk rate.
What about 16MHz/65.2ns needs to be reprogrammed?
Hello tripoli519214
Tell us the project goal to do this modifications.
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