Timer/Counter interrupt when counting down

The Atmel datasheet uses the phrase "overflow" or "match" when describing the timer/counter interrupts. To me, these imply counting up, not down.

Can I assume that in "normal" mode (not any of the PWM modes), if the count direction bit is set to "down," an overflow interrupt will occur when the counter reaches zero? Or maybe when it counts down one more clock to 0xFF? It's not super critical to my application one way or the other, I just want an interrupt at "BOTTOM" plus or minus one prescaler cycle.

The interrupt service routine will then write a new value to the TCNT2 (Clock/timer register) to start a new countdown to the next interrupt. I'd use CTC mode, except the count for the next interrupt will differ each cycle.

Dr_Quark: ...if the count direction bit...

The what?

Good catch. From reading section "18.4 Counter Unit," I got the idea the counter could be configured to count up or down:

Signal description (internal signals): count Increment or decrement TCNT2 by 1. direction Selects between increment and decrement. clear Clear TCNT2 (set all bits to zero). clkTn Timer/Counter clock, referred to as clkT2 in the following. top Signalizes that TCNT2 has reached maximum value. bottom Signalizes that TCNT2 has reached minimum value (zero).

Depending on the mode of operation used, the counter is cleared, incremented, or decremented at each time clock (clkT2). ...

But reading further I found:

18.7.1 Normal Mode

The simplest mode of operation is the Normal mode (WGM22:0 = 0). In this mode the counting direction is always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow Flag (TOV2) will be set in the same timer clock cycle as the TCNT2 becomes zero. ...

So I guess if I want to count "down" from 80 I'll have to set the counter at (255-80)? and count up.

Or set it to zero and catch an compare interrupt at 80.

I'll be counting with a prescale of 1024. Using CTC mode, I probably don't have to worry about setting too low a count and missing a compare due to interrupt execution time. I'll experiment and see which is most suited to fit into the large scheme of doing a lot of asynchronous sampling of switch inputs and taking data in via the serial pin

The interrupts are servicing a phase cutting dimmer, with potential widely varying settings for up to 8 circuits. Using one counter for 8 circuits will require some gymnastics in computing and setting the count to the next interrupt.

The simplest mode of operation is the Normal mode (WGM22:0 = 0). In this mode the counting direction is always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow Flag (TOV2) will be set in the same timer clock cycle as the TCNT2 becomes zero. ...

This implies , to me, that the counter is of fixed value (0xff). I am curious about benefits of having fixed interrupt like that. I suppose it could be used in conjunction with "real" counter value. For example Due core code has "1ms" timer ( sysClk (sic?) ) probably derived from this. I need to check that. Jim

JulyJim, the normal mode isn't restricted to counting to 255 and starting over. My understanding is that there is never a restriction to writing a value into TCNT2, so at the expense of only a few instruction cycles, the first code in the interrupt service routine can be a write command to put whatever value you want into TCNT2. I presume that the counter then continues to count "up" from that value. So if you want the counter to count to 20, you load 236 into TCNT2 and it rolls over and issues an interrupt 20 counts later.

In my case with a prescale of 1024, I doubt that the counter will have even been incremented one count before I've written a new starting value into TCNT2.

I didn't reread the whole thread but was there some aversion to using CTC mode? Then you can have it actually count to 20 fire an interrupt and start over without having to manipulate anything.

I guess I did not get the original note. AS you pointed out - If you preset the counter and than let is count up untill it overflows / resets to zero you have basically set it to time value 0xff - whatever the preset was. Weird, basically down counter since the real outcome is interrupt on overflow to zero. But I am sure there is an application for it somewhere. Jim

The reason for using "normal" mode is that the interrupt service routine is driving a phase-cutting dimmer. There are 8 channels in the unit and the interrupt has a sequence list of 8 bytes that provide the proper timing for each of the circuits. Theoretically, the counts for each circuit can be different, so the CTC mode is only helpful due to the double buffering of the write operation. However, this induces one extra delay in the system, so "normal" is better in this application.