I'm sure this can be done, I fear it will take some in-depth reading of the datasheet
about how to configure the timers so that the period can be safely updated on the
fly. The way this would normally be achieved is a mode that only makes the register
update live as the counter resets to 0, which stops the counter escaping from current
range of counting since 0 is always valid no matter how short a period.
It may be that this works or almost works already, I've only glanced at the timers
(the PWM unit I know better - it might be work a look).
Another way to solve the problem is configure one timer to interrupt at a high rate
(perhaps 100kHz or something like that) and drive a DDS loop. However that
forces your output transitions to always be on an interrupt tick, which might
not be good enough.