Trouble with GLCD running a VK5121

Forum 2005-2010 (read only) Hardware Interfacing
1

I have instructed the config file to use the Modvk5121_Manual_Config.h file and triple checked my connections but I still get this when running GLCDdiags:

Serial initialized
--------------------------------------------------------------------
GLCD Lib Configuration: glcd ver: 3 glcd_Device ver: 1 gText ver: 1
Panel Configuration:vk5121-Manual
Pin Configuration:vk5121-Manual
--------------------------------------------------------------------
GLCD:sed1520 DisplayWidth:120 DisplayHeight:32
Chips:2 ChipWidth:60 ChipHeight:32
 RW:14(PIN_C0) DI:16(PIN_C2) E1:15(PIN_C1) E2:17(PIN_C3)
 D0:8(PIN_B0) D1:9(PIN_B1) D2:10(PIN_B2) D3:11(PIN_B3)
 D4:4(PIN_D4) D5:5(PIN_D5) D6:6(PIN_D6) D7:7(PIN_D7)
Delays: tDDR:90 tAS:20 tDSW:80 tWH:100 tWL:80
Data mode: 
 d0-d3:nibble mode-Non-Atomic
 d4-d7:nibble mode-Non-Atomic
--------------------------------------------------------------------
Diag Loop: 1
Initializing GLCD
Displaying ChipSelect Screens
Walking 1s data test
 Compare error: 0 != 40
TEST FAILED
--------------------------------------------------------------------

One thing I did do was alter the timing parameters to this per the VK5121 datasheet:

// defines for panel specific timing 
#define GLCD_tDDR    90    /* tACC6: Data Delay time (E high to valid read data)             */
#define GLCD_tAS      20    /* tAW6:  Address setup time (ctrl line changes to E high)        */
#define GLCD_tDSW    80    /* tDS6:  Data setup time (Write data lines setup to dropping E)  */
#define GLCD_tWH     100    /* tEW:   E hi level width (minimum E hi pulse width)             */ 
#define GLCD_tWL     80    /* E lo level width (minimum E lo pulse width)                    */
// Original
//#define GLCD_tDDR    290    /* tACC6: Data Delay time (E high to valid read data)             */
//#define GLCD_tAS      20    /* tAW6:  Address setup time (ctrl line changes to E high)        */
//#define GLCD_tDSW    200    /* tDS6:  Data setup time (Write data lines setup to dropping E)  *///
//#define GLCD_tWH     450    /* tEW:   E hi level width (minimum E hi pulse width)             */ 
//#define GLCD_tWL     450    /* E lo level width (minimum E lo pulse width)                    */

Both ways it didnt work. What should I look at first to track this error down?

Thanks
Greg

2

Sorry I missed this. I've only been monitoring the GLCD beta thread.
http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1279128237/

  • Is this a vk5121 module or some other sed1520 module?

  • What Arduino board is this running on?
    (I've tested it on a Modern devices BBB board, a Teensy and a Teensy++,
    and I believe that Michael, tested it on a stock Arduino board)

  • is there anything else hooked up to the Arduino board other than the GLCD module?

  • Is the glcd module displaying anything during the chipselect screens?
    Graphic patterns of any kind?

The error message is from a walking ones memory test that writes a pattern to the lowest location in glcd display memory.

The error is saying that a 0x40 was written to memory but a 0x00 was read back.
But before this happened, a 0x01, 0x02, 0x04, 0x08, 0x10, 0x20
were each written to memory and each read back properly.

Perhaps the wire being used on glcd data bit 6 (Arduino pin 6)
(AVR pin D6) has an issue?

--- bill