Is all of this effort to avoid one timing cycle glitch in the case of a power failure?
If so, what happens if the controlled circuitry also suffers a power failure?
Please explain more clearly what you are really trying to accomplish.
Is all of this effort to avoid one timing cycle glitch in the case of a power failure?
If so, what happens if the controlled circuitry also suffers a power failure?
Please explain more clearly what you are really trying to accomplish.