Hi everyone ..first post ..I was a machine coder in the 80s as well as c and c++
I have a project where I have to read 2 nibbles..they are clocked in parallel so I could do an 8 bit read ..but for the simplicity of the example let's just work with one ...I have another device where the cpu puts out a nibble of data ..the 4 bits are established on the data bus ..a control line goes low indicating the 4 bits are available for processing ..I want to use an ISR routine to sense the control line going low and process the 4 bits into memory on the UNO.. once processed I want to send the result out to and so I or i2c 2 line display.
Every time the control line goes low , 4 more bits are presented on the buss and the control line goes low again ,indicating availability ..This behaviour occurs 7 times populating a character display ...straight up multiplexing ..
The question ...The data window between successive nibbles is around 138uS..
Is there sufficient processing power to read the interrupt ..move the nibble into memory, format it as text and output it to the display... ? ..
I know this is a noob question, I've done some searching but the answers I get are all over the place ...and it represents my lack of knowledge on this processing platform ..