USART_Receive byte TimeOut

For example we have the following func

unsigned char USART_Receive (void){
/* Wait for data to be received */
while (!(UCSRnA & (1<<RXCn)));
/* Get and return received data from buffer */
return UDRn;}

and when we want read RX Stream we have the following code

c = USART_Receive();
switch (c) {
case 'A':  do something very long;
}

and for example we have to many logic for character handler…

so What will be with the next byte in buffer ?
How many byte can be stored in buffer ? if Im not wrong only one
How long it can be stored in buffer until become overwritten ? or not will be overwritten

The Serial class might come handy…

I know Serial has unsigned char _rx_buffer[64]; ring buffer
nevertheless I am interested in the question post#1

I would say you’ll find the next byte, and never overwritten (so other got lost) but I’ve never checked.

My theoretical understanding is that reading UDRn is what clears the receive complete interrupt (RXC ) Flag which enables pushing the content of the Receive Shift Register into UDRn. If you’ve not cleared that flag then I would assume nothing makes it any more into the Receive Shift Register

Curious to know what you find!

my research is insignificant
all that I have found so far is that the raised RXC flag does not interfere with the reception of the next byte…

and as I understand the datasheet - RXC flag generate RXIE interrupt. after executing routine RXC will be cleared automaticaly. which is confirmed by my research

A simple test

setup() should configure the UART in a given baud/mode
then you call USART_Receive()
then delay 5 seconds
then call USART_Receive()again

in the loop you compare what you got for the second read with ‘2’, with ‘3’ and with ‘9’ and blink the built in led in a distinguished pattern

you upload and open the serial monitor and send 123456789 with no line ending and see what’s going on

From the 328P datasheet

The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the receive buffer is accessed. Due to this behavior of the receive buffer, do not use Read-Modify-Write instructions (SBI and CBI) on this location. Be careful when using bit test instructions (SBIC and SBIS), since these also will change the state of the FIFO.

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