Using SPI Clock to generate many timing signals?

Hey everyone

I got in a project that looks like way over my current capabilities and I need your expert help. I have an Arduino DUE board that should be used to control a few driver chips that all need to be synchronized.

I have a readout chips that would spit out analog data at 250kHZ the slowest. I was hoping to be able to use onboard ADC but decided to use external ADC that use SPI protocol (Currently looking at TI ADS1018).

I know that if I were just using the ADC chips it would have been rather easier with the standard SPI libraries however now I need to synchronize my other chips too and I'd like to use my SPI clock for that.

One driver chip for instance needs to operate at 10kHz, and needs a few clock cycle signal (at 10kHz) to start operating. I was wondering if I can count the SPI clock rising edge and use loops for clock drivers on other pins.

Now let's assume I've got 3 chips that has to work at different frequencies (1 row driver working the slowest because it has to wait all the operations completed in a row, 1 integrate and fire (I&F) kind of chip that needs X many clocks to integrate, and then Y many clocks to output 32 analog signals back to back, and the ADC which would read the values from the I&F chip only when it's outputting).

The algorithm would be something like this: 1. Start clock at 250kHz and count rising edge of this SCLK 2. At count 100, raise the row driver chip enable signal on a digital pin, raise the integrate signal pin for 25 cycles 3. At count 125 give the output signal for 5 cycles to I&F, lower slave select for the desired SS, and have it read for 32 cycles

etc etc.

Once the cycle counts are calculated I can put them in for loops and tell row driver clock to flip every Z many cycles to create a slower clock for it.

But the thing is, is this doable? Can I even count the clock edges of SPI? If not what would you guys suggest that I can do?

Thanks a lot in advance

If you are using to standard SPI library, and your lowest frequency device is 10 KHz, then 10KHz is your bottleneck. You don't send/receive data while one slave is in use. And you don't select another slave until the previous is finished. Between selecting each device, you can end and begin SPI communication at the frequency you want.

If you want to bypass that bottle neck then either check to see if the slow device can run off a different protocol and lines. UART / I2C etc, or find a different device.


Thank you for the reply. The slow device (row driver) doesn't even work with SPI. It just needs a clock. The I&F circuit also needs a clock. The only data reading will be from ADC circuits. But I need to be able to tell the row driver when to switch to the next row and the I&F when to start outputting data.

I guess I can re-ask my question as: Is it possible to manipulate digital out pins to provide various enable signals at different lengths based on a standard/SPI clock?

Using just software? I think it might be difficult. Without modifying SPI.h, the library just does it's thing. Or writing your own bit bang code that also synchronizes with the other pins you want. Though I doubt you will get the top speeds you want.

There might be an option with tying the SPI clock output to an interrupt pin to detect a rising/falling edge. And update global variables accordingly. That would require some additional safety circuitry.