Using TPIC6B595 Shift Register

After using 74HC595 Shift registers and ULN2803’s for a while (though not always correctly XD ) I am now trying to now use the TPIC6B595 Shift registers with SPI. I have attached an image of my circuit and here is the basic code that I am starting with. I have kept the code simple until I understand how to drive the chip correctly, Can someone please tell me what I might be doing wrong because it is not working correctly. Also, I assume that the zero’s in my “digit” byte are the ones that are controlling the grounds that will light the appropriate LED’s,
Thanks Pedro.

// use SPI to control eight LED's with TPIC6B595 Shift Register

#include <SPI.h>
#define dataPin 11  // MOSI
#define clockPin 13 // SPI SCLK
#define latchPin 10 // SPI SS

byte digit = B10101010;
byte timer = 100; 

void setup() 
  pinMode(latchPin, OUTPUT);
  pinMode(dataPin, OUTPUT); 
  pinMode(clockPin, OUTPUT);

void loop()

  digitalWrite (latchPin, LOW);
  digitalWrite (latchPin, HIGH);
  delay (timer);

I as a databit in makes the output go low to sink cathode current, same as if driving ULN2803. SRCLR is typically tied to 5, and OE/ tied to Gnd. Output will appear erratic if these 2 pins are left floating.

Delete these - SPI library takes care of them

define dataPin 11 // MOSI

define clockPin 13 // SPI SCLK

pinMode(dataPin, OUTPUT); pinMode(clockPin, OUTPUT);

All GNDs must be connected. Put a 0.1uF cap from Vcc to Gnd.

Thanks Crossroads, I'll try that later (when I finish WORK) 8)

Crossroads, when you say “SRCLR is typically tied to 5 “ presumably SRCLR means pin 8 of the 595, and what does “tied to 5” mean? And OE (output enable?) is pin ? of the SR ? Sorry for my ignorance but I still find that there are quite a few different names for some of the pins of these IC’s EDIT - I worked it out Tied to 5 meant SRCLR (Pin 8 of 595) to + 5V OE is pin 9 (G overscore) of 595 to ground. Thanks again Crossroads 8) easy when you know how


@crossroads I configured a TPIC6b595 on a circuitboard with only pin 10 connected to GND (lower left corner given half-moon at the top) and the other GND pins unconnected. Is this a problem? What consequences might I observe and should I fix the design or is it just a nice-to-have with each GND connected to a common plane?

Currently the circuit seems to be acting as it should, but perhaps there's a failure mode associated with not having them all grounded.

By the by, overscore G is also connected for logic reasons to GND, in case my statement above is misleading.

Thanks for your help.