UTFT library pin editing

system · December 16, 2014, 8:51pm

Hello. I think i recently burned my Arduino DUE digital pin 30. My LCD uses that pin. Maybe anyone here knows how to edit Henning Karlsen's UTFT library to use another pin?
LCD driver: SSD1289
Due chip: SAM3X8E
Thanks in advice!

guix · December 18, 2014, 12:32am

Hello,

Which shield are you using to connect the TFT to the arduino?

UTFT uses port manipulations, because it's much faster than manipulating pins individually. I don't have a Due so I don't really know how hard it would be to modify UTFT.

system · December 18, 2014, 9:00am

Im not using shield, im using just wires. Arduino DUE 3,3v as digital output so it doesn't need shield. If you know how to change those ports you could tell me about it or send some reference, i don't have a single clue in libraries.

system · January 16, 2015, 6:25pm

Anyone could help with this? i really need to finish this project, tho i dont want to buy new arduino.
PS. when i make all pins high all but 30pin is 3.3v, pin30 is stays somehow low. Also i connected pin30 to ground and this problem fixed, after few days same problem.

anatolyk69_gmail.c · January 17, 2015, 1:37am

Have been hacking UTFT for a few days, make it "vertical scroll" supporting on my ILI9486.
So, looks like your model 16-bits, 240x320, is it right? From *.h

#define SSD1289 2

In UTFT/hardware/arm/ hw-sam3x8e.h you need to change writing PD-09 (pin 30 on DUE) to any other free pin.
Look for all references to REG_PIOD, for example _CODR=0x0000064F; - clear output , or SODR - set output. Your pin 30, is number-9 on this port, so 0x0000064F lost to 0x0000044F.
PD-8 (pin-12) its neighbor, so change to 64F to 0x0000054F. Probably, easy to run " find and replace all".
Than,

((cl & 0x80)<<2) has to be ((cl & 0x80)<<1

and look here:
		REG_PIOC_SODR=((VL & 0x01)<<5) | ((VL & 0x02)<<3) | ((VL & 0x04)<<1) | ((VL & 0x08)>>1) | ((VL & 0x10)>>3);
		REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1) | ((VL & 0x20)<<5) | ((VL & 0x80)<<2);

if I'm not mistaken ((VL & 0x80)<<2) has to be ((VL & 0x80)<<1) , so it writes to digital12.

)

Try.

system · January 17, 2015, 10:52pm

Oh man, thank you alot!!! You really saved my project without buying new arduino, thanks thanks thanks.
But i have one more question. If i want to change pin instead of 12 to 43 or 42 what should i do then?

anatolyk69_gmail.c · January 17, 2015, 11:54pm

According to DUE schematic (open source ) pin 42 is Port-A 19, and 43 PIOA_20. So instead of tweaking PIOD, you need to change all references of PIOA:

		REG_PIOA_(????)=0x0000C080;
has to be 0x0008C080 - if you need pin 42
and 0x0010C080 - for pin 43.

I mean, again run "find and replace all" with pattern "0x0000C080" - it would save you trouble, if you missed something.
Next, writing to port, you may leave

REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1) | ((VL & 0x20)<<5) | ((VL & 0x80)<<2);

writing to non-functional port shouldn't be an issue, till you are not reading from it, so | ((VL & 0x80)<<2) should be included in port-A references, with new shift-position-to:

		REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1);

change to:
		REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1)  | ((VL & 0x80)<<12); <- pin 42
or
		REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1)  | ((VL & 0x80)<<13); <- pin 43

I see in "set_direction_registers port A split up for 8-bit mode and 16-bit:

		REG_PIOA_OER=0x0000c000; //PA14,PA15 enable
		REG_PIOB_OER=0x04000000; //PB26 enable
		REG_PIOD_OER=0x0000064f; //PD0-3,PD6,PD9-10 enable
		if (mode==16)
		{
			REG_PIOA_OER=0x00000080; //PA7 enable

I'd change last 0x00000080 to 0x00080080 - if you need pin 42 or 0x00100080 - for pin 43.
And don't forget "fast_fill16"

	REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1);
to
	REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1) |   | ((cl & 0x80)<<12); <- pin 42
or
	REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1) |   | ((cl & 0x80)<<13); <- pin 43

system · January 19, 2015, 3:43pm

Thanks for the reply. I tried do what you said but it didnt worked. Looks like something was missing. Also i got error in this line

REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1) |   | ((cl & 0x80)<<13);

Then i removed "|" and few spaces. Program compiled but problem didnt fixed on that pin.

anatolyk69_gmail.c · January 19, 2015, 4:31pm

How you define "didn't work"?
Post your modified code.

system · January 19, 2015, 6:18pm

Didnt worked i mean its the same problem as it was like port didnt really changed.
This is my current code:

void UTFT::_hw_special_init()
{
#ifdef EHOUSE_DUE_SHIELD
    pinMode(24, OUTPUT); digitalWrite(24, HIGH); // Set the TFT_RD pin permanently HIGH as it is not supported by UTFT
#endif
}

void UTFT::LCD_Writ_Bus(char VH,char VL, byte mode)
{   
 switch (mode)
 {
 case 1:
 if (display_serial_mode==SERIAL_4PIN)
 {
 if (VH==1)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 }
 else
 {
 if (VH==1)
 sbi(P_RS, B_RS);
 else
 cbi(P_RS, B_RS);
 }

 if (VL & 0x80)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x40)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x20)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x10)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x08)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x04)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x02)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 if (VL & 0x01)
 sbi(P_SDA, B_SDA);
 else
 cbi(P_SDA, B_SDA);
 pulse_low(P_SCL, B_SCL);
 break;
 case 8:
#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD)
 REG_PIOC_CODR=0xFF000;
 REG_PIOC_SODR=(VH<<12) & 0xFF000;
 pulse_low(P_WR, B_WR);
 REG_PIOC_CODR=0xFF000;
 REG_PIOC_SODR=(VL<<12) & 0xFF000;
 pulse_low(P_WR, B_WR);
#else
 REG_PIOA_CODR=0x0000C000;
 REG_PIOD_CODR=0x0000064F;
 REG_PIOA_SODR=(VH & 0x06)<<13;
 (VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
 REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1);
 pulse_low(P_WR, B_WR);

 REG_PIOA_CODR=0x0000C000;
 REG_PIOD_CODR=0x0000064F;
 REG_PIOA_SODR=(VL & 0x06)<<13;
 (VL & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
 REG_PIOD_SODR=((VL & 0x78)>>3) | ((VL & 0x80)>>1);
 pulse_low(P_WR, B_WR);
#endif
 break;
 case 16:
#if defined(CTE_DUE_SHIELD)
        REG_PIOC_CODR=0xFF1FE;
 REG_PIOC_SODR=(VL<<1) & 0x1FE;
 REG_PIOC_SODR=(VH<<12) & 0xFF000;
#elif defined(EHOUSE_DUE_SHIELD)
 PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)VL)<<2) | (((uint32_t)VH)<<12)));
#else
 REG_PIOA_CODR=0x0010C080;
 REG_PIOC_CODR=0x0000003E;
 REG_PIOD_CODR=0x0000064F;
 REG_PIOA_SODR=((VH & 0x06)<<13) | ((VL & 0x40)<<1) | ((VL & 0x80)<<13);
 (VH & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
 REG_PIOC_SODR=((VL & 0x01)<<5) | ((VL & 0x02)<<3) | ((VL & 0x04)<<1) | ((VL & 0x08)>>1) | ((VL & 0x10)>>3);
 REG_PIOD_SODR=((VH & 0x78)>>3) | ((VH & 0x80)>>1) | ((VL & 0x20)<<5) | ((VL & 0x80)<<2);
#endif
 pulse_low(P_WR, B_WR);
 break;
 case LATCHED_16:
 asm("nop"); // Mode is unsupported
 break;
 }
}

void UTFT::_set_direction_registers(byte mode)
{
 if (mode!=LATCHED_16)
 {
#if defined(CTE_DUE_SHIELD)
 if (mode==16)
 {
 REG_PIOC_OER=0x000FF1FE;
 }
 else
 REG_PIOC_OER=0x000FF000;
#elif defined(EHOUSE_DUE_SHIELD)
 if (mode==16)
 {
 REG_PIOC_OER=0x000FF3FC;
 REG_PIOC_OWER=0x000FF3FC;
 }
 else
 REG_PIOC_OER=0x000FF000;
#else
 REG_PIOA_OER=0x0000c000; //PA14,PA15 enable
 REG_PIOB_OER=0x04000000; //PB26 enable
 REG_PIOD_OER=0x0000064f; //PD0-3,PD6,PD9-10 enable
 if (mode==16)
 {
 REG_PIOA_OER=0x00100080; //PA7 enable
 REG_PIOC_OER=0x0000003e; //PC1 - PC5 enable
 }
#endif
 }
 else
 {
 asm("nop"); // Mode is unsupported
 }
}

void UTFT::_fast_fill_16(int ch, int cl, long pix)
{
 long blocks;

#if defined(CTE_DUE_SHIELD)
    REG_PIOC_CODR=0xFF1FE;
 REG_PIOC_SODR=(cl<<1) & 0x1FE;
 REG_PIOC_SODR=(ch<<12) & 0xFF000;
#elif defined(EHOUSE_DUE_SHIELD)
 PIOC->PIO_ODSR = ((PIOC->PIO_ODSR&(~0x000FF3FC)) | ((((uint32_t)cl)<<2) | (((uint32_t)ch)<<12)));
#else
 REG_PIOA_CODR=0x0010C080;
 REG_PIOC_CODR=0x0000003E;
 REG_PIOD_CODR=0x0000064F;
 REG_PIOA_SODR=((ch & 0x06)<<13) | ((cl & 0x40)<<1) | ((cl & 0x80)<<13);
 (ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
 REG_PIOC_SODR=((cl & 0x01)<<5) | ((cl & 0x02)<<3) | ((cl & 0x04)<<1) | ((cl & 0x08)>>1) | ((cl & 0x10)>>3);
 REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1) | ((cl & 0x20)<<5) | ((cl & 0x80)<<2);
#endif

 blocks = pix/16;
 for (int i=0; i<blocks; i++)
 {
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);
 }
 if ((pix % 16) != 0)
 for (int i=0; i<(pix % 16)+1; i++)
 {
 pulse_low(P_WR, B_WR);
 }
}

void UTFT::_fast_fill_8(int ch, long pix)
{
 long blocks;

#if defined(CTE_DUE_SHIELD) || defined(EHOUSE_DUE_SHIELD)
    REG_PIOC_CODR=0xFF000;
 REG_PIOC_SODR=(ch<<12) & 0xFF000;
#else
 REG_PIOA_CODR=0x0000C000;
 REG_PIOD_CODR=0x0000064F;
 REG_PIOA_SODR=(ch & 0x06)<<13;
 (ch & 0x01) ? REG_PIOB_SODR = 0x4000000 : REG_PIOB_CODR = 0x4000000;
 REG_PIOD_SODR=((ch & 0x78)>>3) | ((ch & 0x80)>>1);
#endif

 blocks = pix/16;
 for (int i=0; i<blocks; i++)
 {
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 }
 if ((pix % 16) != 0)
 for (int i=0; i<(pix % 16)+1; i++)
 {
 pulse_low(P_WR, B_WR);pulse_low(P_WR, B_WR);
 }
}

anatolyk69_gmail.c · January 19, 2015, 7:22pm

Strange, looks o'k for me.
How do you initialize driver, in this line UTFT myGLCD( ILI9486, 38, 39, CSEL, 41);?
Pin you tested is 43?
If you have a scope, can you confirm that pin is driven?

system · January 19, 2015, 8:03pm

UTFT myGLCD(ITDB32S,38,39,40,41);
And yes, pin is 43.
What do you mean with scope? If its oscilloscope then i dont have it.

anatolyk69_gmail.c · January 19, 2015, 10:37pm

Have you restarted arduino IDE after library mod? It may keep old precompiled data.
Yes, I mean oscilloscope.

system · January 20, 2015, 10:13am

Yes i did. Also i tried with pin 42 and it worked. Seems like something weird happening with my DUE Still thanks for help

timoteo_mendes · January 12, 2016, 5:37pm

Hello manteliukasx,

I know it as been a while since this post but i have some troubles with the same TFT.
I am trying to use the normal Mega 2560 and the 7"display ssd1963.
But after read alot of diferent posts i am a bit confused.
How many wires to you use to connect the TFT? Can you post a foto?
Tried to make a board that connect the DB0 to P22 till DB15 to P37 using a 10K resistor in serie.
Than the:
P38 to RS
P39 to WR
P40 to CS
P41 to Reset
3V3 to RD
using also a 10k resistor in serie.
But now how can i change the pins from the UTFT library in order to have it work or if it is just 4 wires can some one send me a working sketch?

Thanks,
Timóteo

timoteo_mendes · January 12, 2016, 7:24pm

Hello all,

I put it to working change the connections to meet the normal shield...

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