On page 13 of the attached link, under the heading “Synchronous Operation”, paragraph two is the sentence “Both grounds must be connected on the PCB at only one point, ideally close to the GND pin.” What does this mean in terms of board layout? On page 17 is a picture of a recommended board layout which appears to show both GND and PGND connected to the same ground pad that the part’s exposed thermal pad is soldered too. What am I supposed to be avoiding here in terms of PCB layout?
You are avoiding ground lift. This is when the voltage on the ground line is not zero but some higher value. This is caused by currents flowing through the wires causing small voltage drops. This is avoided if all the grounds are connected at a single point rather than being chained.
What is "ground shift problems"?
The ground shifts with the output.
They are basically talking about a similar idea to a "star" grounding arrangement, where you want to avoid inductive ground loops which can cause noise, oscillations, and magnetic-field inductive transmission. Since the ckt is using an inductor as its major component, you don't want it inductively coupling willy-nilly [FYI, a rigorous engineering term] to any other part of the ckt, such as an inductive ground trace.
Check here for nice spaghetti designs, http://www.google.com/search?q=star+grounding&hl=en&tbo=u&tbm=isch&source=univ&biw=990&bih=824&sei=4k_rUOvZFaaZiQK1koGYBQ
Strictly speaking, a ground shift problem involves the current through a trace or wire causing a voltage shift due to the resistance of said trace|wire, which appears on the ground of another ckt which is wired in a daisy-chain fashion off [ie, downstream] of the first ckt. Simple V = I * Rwire. Also, at high-frequencies, the inductance [impedance] of said trace|wire also becomes a factor, ie V = I * Zwire. So, the star wiring arrangement is intended to eliminate such daisy-chain wiring.
While most of the replies are spot on, here is a practical example.
Say you have an ADC chip that uses ground as a reference. You run the ground signal along a trace which joins a trace that has a high-current device on it. The combined trace then continues to the power supply ground.
Since the trace has resistance, when the high current device is operating it will cause a voltage drop along the combined trace which will lift the ground to the ADC by I*R, throwing off the ADC results.
Thanks for all of the great replies everyone and I think I understand now. So I mostly want to avoid a situation where the GND and PGND are sharing a single trace before they reach a ground plane?
Yes that is it. :)
Awesome! Thanks again everyone!
"ground shift problems"?
Otherwise known as earthquake.
The spec sheets for A/D converters usually talk about using separate grounding systems [ie, ground planes] for digital and analog cktry, and also using a one-point ground connection between the 2 planes, and also never running digital traces into the analog areas. Therefore, with good design, the ADCs will never see a ground shift associated with high-current devices.
The ADC thing was just a contrived example I came up with. It probably has nothing to do with his project 8^)
I did that once, grounded a controller up stream of a 10A DC switch and everything else to the battery. Reset the controller... The Good News was that it took a 1" piece of wire.. The Bad News was that I had to do it. I moved a part a tenth and re-poured the ground plane to do it. I didn't think the change was serious enough to run the DRC again..
Docedison: I moved a part a tenth and re-poured the ground plane to do it.
I keep reading / hearing the expression "re-pouring of a ground plane" - what exactly does this refer to, please?
Some pcb layout programs do the pour automatically, after all the traces have been laid out, so you don't need to do it manually. Plus, the programs should be smart enough that they don't accidentally short everything out in the process.