What is this opamp configuration?

Hi, I am confused in the configuration of this op-amp. I did this simulation but results are not clear to me, when dc voltage given it is simply acting as a comparator and when AC given I directly get 9V. I don't think this is an integrator because there is no resistor.

The behaviour you described means that it will stay high for AC with peaks greater the 5.1V and for DC or AC with peak less than 5.1V it will stay low...

You can read the description of an integrator here https://www.arrow.com/en/research-and-events/articles/fundamentals-of-op-amp-circuits and see what it says about a low frequrency sine wave as input.

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That configuration is an integrator. It outputs the intergral of the input waveform. The intergral of a Sin is a Cos, so that is what it will produce, given that the input wave is biased at arround zero volts.

If you put into it a constant voltage it will output a ramp, until it hits the voltage output limit of the operational amplifier. If you put a fixed voltage comparator on the output and then feed that back into the input, you will get, if the signal the right way round, a saw tooth waveform.


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That is simply a bad circuit, you have two voltage sources fighting each other, or put another way the opamp will saturate to its current limit immediately, and probably want to oscillate as well due to the capacitive load. Also the inverting input is driven 2V below the negative supply rail of the opamp, likely frying the chip anyway.

Also there are two very different voltage sources on the two inputs with nothing to limit the current, some low-noise opamps have protection diodes across the inputs and these would be immediately fried in this circuit.

This circuit is not an integrator since the input is a voltage source, not a current source. To integrate a voltage you first need to convert it to a current via a resistor as haseebzaib pointed out. Capacitors integrate current to give a voltage result.

Looking at the circuit I suspect the reference for V3 was meant to be the virtual ground (output of V1), not actual ground. Or V3 was meant to be a current source which makes the most sense to me.

Why is there no output? Is the circuit suppose to appear as some type of load to the input voltage source?

Hello guys, thanks for the replies. This circuit is actually part of a bigger circuit and this is the only portion which I dont under stand. The 5.1v on the + input is actualy being given by potentiometer of 10k. The input on - terminal is coming from a multiplexer. I am using AC in this diagram as I was trying to understand the behaviour.

This is part of a pulse induction metal detector, it is responsible to stablize the metal detector when it becomes unstable. There is a button which u press to stablize it and that button is connected to multiplexier and multiplexer output is connected to this citcuit.

You know we love it when this happens. Not.

There is virtual grnd but v1 is not supposed to be that. As u can see i am giving 10.6v there is a reason for that. As i said earlier this circuit is part of bigger circuit. The v1 is just supposed to be a threshold voltage according to my understanding but i am not sure.

I did not posted the whole circuit because there is no point in doing that. It confuses people and divert from actual thing xD

No, quite the opposite - what you've posted out of context is nonsensical, so you've got something wrong and not communicated the actual details of the circuit that matter to its function, leading us all on a wild goose chase.

My intuition is that the signal source is not a pure voltage source, probably not centred about ground either.

No, missing detail confuses people. At least the people with enough knowledge to answer your question.

Ever done a jigsaw puzzle where you only have half the picture you are trying to make?

In that case there is no point attempting to assist you. :crazy_face:

Your circuit would be an integrator if it had a resistor between the voltage source and the inverting input of the op amp. Since it doesn't, it really isn't anything but a failure. It will catapult the op amp into output current limiting that is designed to prevent the device from burning out, until the capacitor is charged each time it transitions. After that, it's sort of a comparator, but a very poor one because the capacitor will slow it down as well as overloading the op amp output.

Also, there is no conceivable external circuitry that could ever make it work "right". So it is indeed irrelevant what other stuff you have going on there.

It looks like you've charged ahead with some design ideas without researching op amps very much.


Op-Amp integrator takes me back to University, the might Analog Computer, ours had a chart recorder connected to it.

Tom... :smiley: :+1: :coffee: :australia:

thats what I am trying to explain for this circuit other stuff is not necessary so much as it is acting independently and it is only getting input from multiplexer.

not exactly. I am currently reverse engineering this circuit and this is the part where I got really confused, all the other parts I understood by splitting them and understanding them independently.

And we are saying that this is a very flawed approach if you want some help. That missing resistor could well be hidden in the impedance of what is driving the negative input of the op amp, making your simulation useless, or at best unrepresentative of what you really have.

Your circuit shows a source impedance of zero (the ac source) while in fact it is of the order of 5k depending on the position of the pot slider and any other components connected to it.
Which makes the circuit an integrator.
Unless there are other components you also havent mentioned?

I'd suggest you read this

Likely because you made an error in reverse engineering it. I also just noticed that voltage source V3 is referenced to the wrong ground, its signal will be outside the op amp's input range. It should be referenced to the voltage applied to the non-inverting input.

It is likely why you "directly get 9V" at the output.

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