Interesting ...
But wouldn't I have an issue with a null state, given that I want to implement dominant bits.
If both lines are high when null then the following would be true, wouldn't it?
| State | D1 | D2 | |
|---|---|---|---|
| NULL | - | H | H |
| 1 | - | H | L |
| 0 | - | L | H |
| Error | - | L | L |
If two devices are in contention over a bit it is easily detected but the data is destroyed in the process, all be it with the devices able to determine which should have had priority.
Please correct me if I am wrong but the options are:-
Bias the network to HI/LO which gives a default of 1 0r 0 depending on how you interpret it, I will assume its a 1.
Not ideal because you don't know a bit has been sent unless its a 0.
Allows dominant bits, 0's to talk over 1's so collisions can be detected, and a device quieted, without loosing data. Messages do not need to be resent.
Bias the network to HI/HI which gives a default of null
All data is positively identified, including errors - Error bit sent
When a collision is detected the data must be resent from scratch.
The only other options I can think of involve timing ...
-
Split the bit into phases, 'error check' and 'valid data'.
This would allow a device attempting to send a recessive bit to identify the error and release the lines before other devices on the bus read the data. -
Bias the bus LO/HI and have only two valid states [LO/HI > NO Data | HI/LO > Data]
The time between a No-Data>Data transition and a Data>No-Data transition would indicate 1 or 0
Since any device could hold the bus in a 'Data' state the longer of the two pulses would naturally be dominant
Detecting errors with LO/LO and resending if necessary seems the simplest option to me and unless the network was crazy busy the overhead doesn't seem that bad, I was only planning to use one byte for message priority which means a conflicted message would almost always be ditched within the first 8 bit
I would like to try and do this, first experiments anyway, directly with the 5v digital pins.
I think initial experiments should concentrate on sending and receiving bits, which I suppose I need to think of a tri-state 1,0,Err
I would be most interested in your thoughts before I dig in ...
Al