I am using Qualcomm Atheros's AR9331 to design one router.
But about the reference circuit provided by Atheros, I am confused with the RF front end part design of AR9331, which is shown
in the attached picture.
The following is my understanding about PCB design
As shown in the attached picture, RFOUTP/RFOUTN are from the output of the AR9331, while RFIN1P/RFIN1N are the input signal
to AR9331. Part A circuits are the design of the Balun. Part B is the matching circuit between PA of AR9331 and balun while Part C
is the matching circuit between LNA input and balun.
Then why Part B and C are connected together? And how are they getting to work? Thank you.