After playing with two shift registers this weekend and getting them to work in series with the ATmega's hardware SPI, I started thinking of how I could go about wiring multiple shift registers in parallel--meaning driving them with different latch pins but the same SPI clock and data pins. I don't have any particular projects in mind but I mainly wanted to think this through to see if I understand the electronics theory correctly.
If I'm reading the datasheet right, then writing to the MOSI and SCK pins will program all shift registers simultaneously, but only the shift register that sees a low-to-high transition on its RCLK (latch pin) will commit the new values. Is this an acceptable way to run it (rewriting all registers' values every time but only latching the one you need)? I suppose there's nothing wrong with that, just seems odd. (and I wouldn't feel comfortable controlling something mission critical like that, not that I'm making anything mission critical though LOL)
An alternate configuration I thought about would be making it so the SCK pin has to pass through a PNP transistor (1 per shift register chip) before reaching each shift register's SRCLK pin, and that PNP transistor's base will go to the latch pin for that relevant shift register--the result being that each shift register will only see the SCK signal if its corresponding latch pin is set LOW, thus making the latch pin an effective selector pin too. Does this sound right? Just want confirmation if I'm following the logic correctly.
I'm guessing the transistors for each shift register would be wired with Base->Latch pin on arduino, Emitter->SCK pin on Arduino, Collector->SRCLK pin on the shift register. I suppose a suitable resistor would be needed on the Base too? or maybe not... and would I need a pull-down resistor on the shift register's SRCLK pin?