If you're going to go there, maybe emulate the hardware cascade approach instead?
I'm not familiar with the hardware cascade approach, but if its only XOR and XNOR functions that can handle 2 to 8 inputs, then perhaps the 8 input statements I posted could be put into functions where the variables are assigned defaults if unused (scalable). Perhaps they would execute in fewer cpu cycles as its just one logic statement.
My idea for all this, is as I learn C would be to replicate some basic functions that are already available in other languages or software development environments. The graphic to the left is what's available in the Xilinx Schematic Editor - similar functions are available in LabVIEW.
SirNickity, and others, I truly appreciate your input - thank you.