Hi Guys,
Not sure if this is the right sub forum, but i think i pinned it down back to the bridge library.
For a project we had first arduino due -> yun shield -> tcp/ip communication to raspberry.
The idea at some point came to kick out the yun, use the bridge lib and the python stuff from the yun.
So far, so good. All is setup, all ports are behaving like expected but....
At the linux ttyX sides, we see some garbage. But not all.
What we find out is the following:
- No ground issue
- No level shifter, due is 3.3V as so are the raspberry's and banana pi's
- Raspberry and banana get same result
- Can reproduce it on a custom openwrt img for dragino, stock fw lack anyway
- USB uart ttl connector doesnt show the garbage.
- When trying direct uart communication, there is no garbage
- Same garbage we see a mega board.
- Garbage can be seen with saelea logic testers.
- Garbage can be seen with strace on the bash proces.
Strace output
Dont look at the path, it are just guesses of the env var. Completely normal. I will mark the behavior with bold.
stat64("/usr/bin/\371run-bridge", 0xbed7a840) = -1 ENOENT (No such file or directory)
stat64("/sbin/\371run-bridge", 0xbed7a840) = -1 ENOENT (No such file or directory)
stat64("/bin/\371run-bridge", 0xbed7a840) = -1 ENOENT (No such file or directory)
Notice the \371
read(0, "r", 1) = 1
write(2, "\371", 1) = 1
read(0, "u", 1) = 1
write(2, "ru", 2) = 2
read(0, "n", 1) = 1
write(2, "n", 1) = 1
read(0, "b", 1) = 1
write(2, "b", 1) = 1
read(0, "r", 1) = 1
write(2, "r", 1) = 1
It could be after digging so many time i got blind and looking complete in the wrong spot. For that sorry for that ahead :)!
Anyone some lightning up ideas ?
