I have an existing system that sends and receives messages using a 50Kbps AMI (alternate mark inversion) encoded data bus.
It uses differential +/- 5V signals.
I would like to use an Arduino to receive the messages convert them to something more usable (i.e. anything that uses UART) and send it out to remote HMI.
One frame/cycle is 120 bits:
Sync - 24 bits (static)
Data - 64 bits
Flag - 32 bits (only 2 different combinations used)
Due to the +/- 5V signals, I know I would have to use some kind of analog frontend to convert the negative pulses to positive pulses. At 50Kbps, (20us pulses), I should be able to bitbang with either board. Since it is a constant stream I think it might be a good idea too offload this to a separate chip? I have been unable to find anything I can definitively say is made just for this task. I was looking at the AD7321 and connecting it via SPI to the Arduino, but even that doesn't seem like a real solution.
I'm still in the brainstorming phase of this project, so I don't have much set in stone. The model of Arduino hasn't been determined. I've looked at the Uno and the Mega, but I'm open to looking at other options. I know I still have a great bit of research to do, but I would greatly appreciate any input anyone would provide.
Is the voltage on the line always +5v or -5v, or is there something in between there?
If there's no valid in-between state, just connect it to a 1:1 resistor divider to Vcc... (say 10k or 100k resistors), and connect arduino pin to the middle.
If there is, maybe could detect it with a comparator and minimal ingenuity and signal it with another line.
So you end up with an input that's HIGH when the line is +5, 0 when it's -5.
What does the format of the data look like?
I would try to use the Input Capture facility of Timer1 to figure out the time between pulses and figure out whether the next bit is a 1 or 0; This ISR needs to be written very efficiently, as you have just 320 processor cycles per bit on a typical AVR micro...
According to this page, the Alternate Mark Inversion bus is a three level signalling system.
On either end of the transmission line, there must be a circuit that translates single ended signals (possibly 0 and 5V) into the AMI differential signals and vice versa. Consider tapping into that, rather than reading the transmission line directly.
jremington:
According to this page, the Alternate Mark Inversion bus is a three level signalling system.
Yes, -5V and 5V are both counted as 1/mark and 0 is 0/space. I'm looking at using a couple high frequency op amps to mirror all the negative pulses. I simulated a circuit this afternoon and it did what I wanted to. That takes care of the biploar inputs.
jremington:
On either end of the transmission line, there must be a circuit that translates single ended signals (possibly 0 and 5V) into the AMI differential signals and vice versa. Consider tapping into that, rather than reading the transmission line directly.
The circuits on either end are specifically created transceivers, which are obsolete. So obsolete some of the IC's in them (I.E. the AMI encoding chip) were last manufactured in the 1990's. What I have figured out is the data format.
The 64 bits of data in the stream are actually four 8-bit words. Each word is sent and then the inverted word is sent as a parity check.
d0 - d7: The first word is a memory address
d8 - d15: the data to write to that address
d16 - d23: the data to be written to the first address + 1
d24 - d31: the data to be written to the first address + 2
Once the data passes the parity check, those 32 bits are the only ones I care about.