AGND DGND Multiplexer 4067 questions

Hello I'm actually finishing a protoype.

I have read a lot of things about AGND and DGNG but I'm note sure to clearly understand what I must achieve in my case.

My goal : reduce noise at maximum possible to read pots without noise. (I had problems in the past with Max7219...) at max resolution possible (10bits).

Here is my prototype (without caps 47uF 0.1uF around regulator) :

Digital part : A led display with some 74hc595 and TPIC6BC595 with 0.1uF capacitors between power supply and ground. -> The final ground goes to the ATMEGA2560

Analog Part : 10 pots all grounded on the same Ground -> The final ground goes directly GND on main ground ?

There is a multiplexer CD4067 BE with a 0.1uf capactito on supply. Where the ground is supposed to go ? Can it cross all the DGND of the display or should it be on the AGND and star grounded at the main GND like my shematic ?

Well I'm a bit lost with all the informations, ferrite users or not between grounds, ground plane, ground way...etc.

Here is a schematic attached. The dotted ground is my suppositions.

If you have any advises to keep my analog values as clean as possible and the good practice I can appreciate.

All the best :).

Koala-AGND-DGND-Help.jpg

Koala-AGND-DGND-Help.jpg

Read this:

Dotted orange ground - a bad idea.
Dotted green ground - the right way as long as all the grounds go to that red spot. And the red spot is moved to the ATmega ground.
Make sure your 0.1uF capacitors on all the chips are ceramic and their leads are as short as you can make them.

It would be a good idea to have a star connection for the +5V as well, and maybe even a Pi filter on the +5V going to the analogue parts. If you can't manage the inductor then a 10R resistor and 47uF in addition would help.

Hello Guys and thank you for your cool answers and grumpy_Mike for ths advises.

I have updated my schematic (attached) with more informations an the Pi filter.

All chips will have ceramic capacitor 0.1uF as close as possible to each chips pin power supply.

The ground is a star ground as we can see. Do you think it's a bad idea if AGND from 10 Pots goes to Multiplexer ground (in dotted red) because all this components will be on a PCB connected with pinhead to another PCB, but if you think it's better to not mix this grounds before star point, it's ok :).

Thank you very much for your knowledge it's really helpful.

Place ferrite beads on the power supply side of filter capacitors.

PCB should have two ground plains, one for analog, one for digital.

Power traces as wide as can be accommodated.

Are you making a PCB? I'd go with Gnd planes instead of running ground traces all over.

"Digital part : A led display with some 74hc595 and TPIC6BC595 with 0.1uF capacitors between power supply and ground. -> The final ground goes to the ATMEGA2560"

What kind of digital display are you using that needs two kinds of shift registers?

You don't have to go all-in on analog filtering, using digital filters will work fine in most cases. But that doesn't mean that you shouldn't care about the analog design at all, of course.

I often use this FilteredAnalog class to read potentiometers etc., and it works great. It uses a combination of digital filters and hysteresis. You can even go higher than 10 bits without noise if you oversample at a high enough rate.

Here's an example on how to use it: FilteredAnalog.ino

Pieter

Additional to the fantastic suggestions above would be to keep any cables as short as possible and shielded or twisted pair to further reduce noise.

Bob.

Thanks everyone :).

@larryd Ferrite beads or inductor like in the Pi filter I've done ? what's the difference according to my goal (remove noise for readpot at highest resolution) to use a ferrite instead of an inductor ? cost ? Or do you mean to add a ferrite furthermore the inductor ?

  • Well the Analog part (POT+multiplexer) is on a separate PCB, connected with pinhead to the main PCB.
    Actually I haven't done any ground plane because I don't understand the benefit and I've read that it's not always a good idea...

@CrossRoads Thank for your suggestion. Same question why ground planes instead of big traces ?

The display is composed of 20 * 5*7 dot matrix displays. I have done a lot of test and the best and cheaper way I've found is this pattern : 1/14 persistence.

74HC595 handle the rows, TPIC6B595 hande the columns to sink the current. It's controlled via SPI. I don't use a library, I've written my own function, I've never seen a 57 dot matrix library only 88.

d1 d2 d3 d4 d5

X - - - - - - | - - - - - - - | X - - - - - - | - - - - - - - |
X - - - - - - | - - - - - - - | X - - - - - - | - - - - - - - |
X - - - - - - | - - - - - - - | X - - - - - - | - - - - - - - | etc..
X - - - - - - | - - - - - - - | X - - - - - - | - - - - - - - |
X - - - - - - | - - - - - - - | X - - - - - - | - - - - - - - |

The display is achieve thank to persistent 1/14. The result is very good and very bright. My goal is to have as less as current possible. I use a dozen of 74hc595 and 3 or 4 TCPIC595.

@PieterP
I'm sorry but a 1ms delay with 10 pots is 10ms delay and it's not acceptable in this project so the library you use is useless in my cas. Nevertheless can you explain the oversampling ? The ATmega2560 is only 10 bits ADC ?

@ballscrewbob only PCB with smd chip components, no cables :).

poppy381:
@PieterP
I'm sorry but a 1ms delay with 10 pots is 10ms delay and it's not acceptable in this project so the library you use is useless in my cas. Nevertheless can you explain the oversampling ? The ATmega2560 is only 10 bits ADC ?

That conclusion would be incorrect.

There is no delay. The example uses millis for timing, so it doesn't block. The rest of the loop runs at maximum speed.
The timer is only there to limit the number of samples, because there is simply no need to take more than 1000 samples per second in most cases. You can get rid of the timer if you want to, it'll still work just fine, but you might have to increase the filter factor.

The cut-off frequency of a filter depends on two things: the filter parameters and the sampling frequency. This is an inherent fact about digital filters, not a limitation of the library. The 1ms sampling interval is arbitrary, you can go much lower if you have to.
It's just there so that, no matter whether you're using a 1MHz ATtiny or a 600 MHz ARM chip, the filter will always work correctly with the same filter factor, independent from how fast the loop() repeats.

Even when using the example code with the timer, using 10 pots will still have a sampling interval of 1 ms, not 10 ms.

Oversampling is just taking more samples than you need and then averaging the result. The library does this automatically and you can take advantage of it by specifying a precision that's higher than the ADC resolution.

Ground planes add distributed capacitance to the system therefore improving noise rejection.

Also, ground ‘traces’ form loops that function as antennas thus increasing RF susceptibility ‘and’ emissions of the PCB. Using a ground plane avoids this antenna effect.

Inductors and beads do the same. You can easily add beads to power wires. Cost is not high, see eBay.

@PieterP

Ok I'll give it a try it sounds not so bad and the oversampling interest me a lot :).

@larryd

Ok thank for the explanations it's very clear :).