Hi,
I am struggling for few days to find solution and explanation for weird beahviour (so, posted code is trying basic stuff). When I malloc memory in SDRAM for string in CM7, which I want to modify in CM4 core, data which CM4 see are different. I've added cache clearing and invalidating, but no luck with solving this - does anyone have any ideas?
Thanks 
Code CM7:
#include <SDRAM.h>
#include <RPC.h>
#define BUFF_SIZE 128
#define BUFF_TEXT "Toto je nouzove volani o pomoc lodi Jupiterske dulni spolecnosti Cerveny trpaslik"
char *sdram_text;
void setup()
{
Serial.begin(115200);
while (!Serial);
RPC.begin();
SDRAM.begin();
sdram_text = (char*)SDRAM.malloc(BUFF_SIZE);
Serial.println((uint32_t)sdram_text, HEX);
memset(sdram_text, '\0', BUFF_SIZE);
strcpy(sdram_text, BUFF_TEXT);
SCB_CleanDCache();
Serial.print("Text: |");
Serial.print(sdram_text);
Serial.println("|");
delay(1000); //delay
RPC.call("modify_buffer", (uint32_t)sdram_text, 32);
delay(1000); //delay
SCB_InvalidateDCache_by_Addr(sdram_text, 4);
Serial.print("Text po zpracovani: |");
Serial.print(sdram_text);
Serial.println("|");
Serial.println("==========================");
}
String b = "";
void loop()
{
while (RPC.available())
b += (char)RPC.read();
if (b[b.length()-1] == '\n')
{
Serial.println(b);
b = "";
}
}
Code CM4:
#include <SDRAM.h>
#include <RPC.h>
void setup() {
RPC.begin();
RPC.bind("modify_buffer", modify_buffer);
}
void modify_buffer(uint32_t pointer, uint32_t len)
{
char *p = (char*)pointer;
RPC.println(p);
}
void loop() {}
Data being received in CM4 (I've used RPC.println to get them back):
Totj je nouvove volini o pococ lodiuJupitereke dulns spolecsosti Ceeveny trsaslik
have you tried using a fixed memory location such as the beginning of SDRAM4 space at 0X38000000?
As a try:
Before the RPC.call() add:
SCB_CleanInvalidateDCache_by_Addr(sdram_text, BUFF_SIZE);
Or change SCB_CleanDCache() to SCB_CleanInvalidateDCache()
Trying to use SDRAM as shared memory between M7 and M4, I get the same problem : chars can be wrong when exchanged between M7 and M4 through read/write.
The problem is even worse : M4 can't read correctly what it writes in the SDRAM !
This excludes a cache managment problem.
To understand and localize the dysfunction (and try to find a solution) I searched in the files around SDRAM and in SDRAM.cpp (yes, it was easy) found a "beautiful" test checking if the SDRAM is working fine or not :
bool __attribute__((optimize("O0"))) SDRAMClass::test(bool fast, Stream& _serial)
When executed on the M7 core, no problemo !
On the M7 :
#include <Wire.h>
#include <RPC.h>
#include <SDRAM.h>
void setup()
{
int i;
// Ouverture de la liaison série via USB-C
Serial.begin(115200);
delay(1000);
// Initialisation SDRAM
SDRAM.begin();
Serial.println("M7: test SDRAM...");
SDRAM.test(false,Serial);
Serial.println("M7: test SDRAM done");
// M4 launch
RPC.begin();
}
// Main loop
void loop()
{
while(RPC.available())
Serial.write(RPC.read());
}
On the M4 :
#include <RPC.h>
#include <SDRAM.h>
//
// Initialisation
//
void setup()
{
// Initialisation des RPC
RPC.begin();
// Initialisation SDRAM
SDRAM.begin();
RPC.println("M4: test SDRAM...");
SDRAM.test(false,RPC);
RPC.println("M4: test SDRAM done");
}
// Main loop
void loop()
{
}
And the output is :
M7: test SDRAM...
M7: test SDRAM done
M4: test SDRAM...
address bus test failed! address (60000007)
and the GIGA R1 is stopped ( __asm__ volatile ("BKPT"); called in the test method).
I don't know if it 's only my card who has a hardware bug between the M4 and the SDRAM or if it's always the case, but the only solution for me is to use regular RAM between the cores.
In a nutshell : Only the M7 core can use the 8MB of SDRAM.