I'm trying to find some common ground here, that's why.
On a atmega processor it generally makes more sense to use 8 or 16 bit parallel mode, but in general one doesn't have the pins or has to make writes to a few ports. If we go to a due or similar then DMA is available and in general having an SPI display eases layout quite significantly.
SPI also allows seamless migration between devices with close to zero effort, rather than designing a new layout I can concentrate on the software side. Level shifting is also easier.
I'm surprised no one has ever done this to be fair, seems trivial!
As to the button question, well I just figured out that if I want maximum performance i could use the same system and leave port expanders attached on the I2C bus for less intensive applications
What is the 74xx139, 2 address pins to 1 of 4 output pins LOW, ideal for?
I would think a 3 control line to 8 latched pins, HIGH or LOW, would be more useful - i.e. a shift register.
CrossRoads:
What is the 74xx139, 2 address pins to 1 of 4 output pins LOW, ideal for?
I would think a 3 control line to 8 latched pins, HIGH or LOW, would be more useful - i.e. a shift register.
For my application, managing the CS/SL SPI pins of an external SPI bus comprising of a TFT, a SD for logging, a few outputs and perhaps an another optional device such as a high speed FRAM or a CAN controller. Surely this can be increased to 9 using only 9 outputs. I don't believe I will need to go that wild and load the bus with 9 devices, but the possibility is there.
The demultiplexer doesn't have any delays associated with sending the data trough the SPI bus, so for only four devices its a great choice and doesn't compromise a lot of free pins.
CrossRoads:
What is the 74xx139, 2 address pins to 1 of 4 output pins LOW, ideal for?
I would think a 3 control line to 8 latched pins, HIGH or LOW, would be more useful - i.e. a shift register.
A demultiplexer has many handy uses, when only one output needs to be active at a time. For example:
control lawn sprinkler valves (they always run one at a time because of limited water pressure/flow)
drive LEDs by scanning quickly: persistence of vision makes them seem steady
scan rows of a matrix display or keypad
drive the appropriate segment of a Nixi tube
control several SPI device chip select lines with only three pins
use as an address decoder to take the high address lines and select the appropriate chip in a memory bank
Admittedly, a 2:4 demultiplexer isn't so dramatic since it only saves two lines. But a 4:16 demultiplexer saves 12 I/O lines. which is significant.
Having an active low output is a natural for many applications, like the SPI chip selects, memory chip enables, and LED drivers. It works well with a high side switching PNP transistor. Active low is the most commonly used way to implement these sort of select lines, probably dating back to the old 74xx TTL days when a TTL output could sink far more current than it could source -- it made sense to to make the active state low since that's how the chip could do the most work. These days, with CMOS logic that can source just as much current as sink, it's less of an issue, and a lot of people use positive logic just so they don't have to think about what they're doing. I'm old school, and I have no problems thinking about switch inputs and LED outputs being negative logic -- it seems natural to me.
I would think a 3 control line to 8 latched pins, HIGH or LOW, would be more useful - i.e. a shift register.
A demultiplexer is ideal where only one output will be active at a time, or where it must be assured that only one will ever be active at a time (like when enabling drivers onto a shared bus.) If the application fits that model, using a demultiplexer over a shift register has the advantages of much higher speed (virtually instant outputs: no clocking out serial data and controlling latch lines) and much simpler code (simply write to a GPIO port.)