i have tracked this down to booting the M4.
i was successfully using the M7 to take in a 10Mhz signal on pin PA0 which is the the TIM2 ETR pin. i was prescaling and dividing this down to make a nice accurate microsecond counter. the 10Mhz is the output from Chip Scale Atomic Clock (CSAC).
now i am trying to work the M4 into my project and if i simply create a blank sketch for the M4 with a while(1) loop in setup() as soon as i call bootM4() from the M7 it is somehow trampling the 10 Mhz on PA0. withe an oscope you can see everything is fine with the 10Mhz on PA0 until the moment i call bootM4(). here is the setup code for timer2 ETR functionality. and the interrupt routine.
any help is greatly appreciated!
void setupTIM2() {
RCC->APB1LENR |= RCC_APB1LENR_TIM2EN; // Enable TIM2 clock
TIM2->CR1 = 0; // Reset control register
TIM2->PSC = 4; // Prescaler set to 5 (PSC + 1)
TIM2->ARR = 0xFFFFFFFF; // Max auto-reload value (free-running)
TIM2->CNT = 0; // Reset counter
TIM2->DIER |= TIM_DIER_UIE; // Enable update interrupt
// Configure PA0 as Alternate Function (AF1 for TIM2_ETR)
GPIOA->MODER &= ~(0b11 << (0 * 2)); // Clear mode bits
GPIOA->MODER |= (0b10 << (0 * 2)); // Set to Alternate Function mode
GPIOA->AFR[0] &= ~(0xF << (0 * 4)); // Clear AF selection
GPIOA->AFR[0] |= (0x1 << (0 * 4)); // Set AF1 (TIM2_ETR)
// Configure TIM2 to use external clock mode 1 on ETR (PA0)
TIM2->SMCR = (7 << TIM_SMCR_SMS_Pos) | // External Clock Mode 1
(7 << TIM_SMCR_TS_Pos) | // Trigger source = ETR (PA0)
(1 << 12); // Set ETR prescaler to divide by 2
// Ensure ETR is active high
TIM2->SMCR &= ~(1 << 15); // Clear ETP bit to select active high
// Disable digital filtering on ETR
//TIM2->SMCR &= ~(0b1111 << 8); // Clear ETR filter bits
TIM2->ARR = 999999; // Set rollover to 1,000,000 counts
TIM2->CR1 |= TIM_CR1_ARPE;
//TIM2->EGR = TIM_EGR_UG; // Manually trigger an update event
TIM2->CR1 |= TIM_CR1_CEN; // Enable the counter
NVIC_EnableIRQ(TIM2_IRQn); // Enable TIM2 interrupt in NVIC
}
extern "C" void TIM2_IRQHandler() {
if (TIM2->SR & TIM_SR_UIF) { // Check if update interrupt flag is set
TIM2->SR &= ~TIM_SR_UIF; // Clear the interrupt flag
secondsCounter++; // Increment seconds counter
topSec = 1;
}
}