Ch-19: Introduction to Intel 8086 Microprocessor

Microprocessor or Microprocessing Unit or MPU is a programmable device. It can be programmed (trained) to (a) take command from the user, (b) data from the user, (c) modify data in a way the user has wanted through the command, and (d) deliver the result to the user. The 1st MPU was 4004 which arrived in 1971 and was containing 2300 transistors, 16-pin DIP package, and 4-bit data lines. 8085 appeared in 1976 with 6500 transistors, 40-pin DIP package, 16-bit address lines, and 8-bit data lines. 8086 appeared in 1978 with 29000 transistors, 40-pin DIP package, 20-bit address lines, and 16-bit data lines. 80386 appeared in 1985 with 275000 transistors, 132-pin PGA package, 32-bit address lines, and 32-bit data lines. Pentium-I arrived in 1993 with 310000 transistors, 64-bit address lines, and 32-bit data lines. Core-i3 arrived in 2011. Broadwell-EP Xeon arrived in 2016 with 7.2 billion transistors. All computers of Intel architecture contain 8086 as a core; and after power up, they come up in 8086 mode known as Real Mode/DOS Mode to accomplish all necessary initialization tasks before switching over to PVAM (Protected Virtual Address Mode) Mode operation.

19.1 Physical Pin Diagram of 8086

Figure-19.1: Physical pin diagram of 8086 microprocessor

The CPU design has been implemented using HMOS technology to achieve high performance. The 8086 operate at 5MHz, the 8086-2 at 8MHz and the 8086-1 at 10 MHz with maximum power dissipation of 2.5W. There are corresponding CMOS versions (80C86, 80C86-2, 80C86-1), which operate at the same frequencies as for the HMOS 8086s but with maximum power dissipation of 1W.

The 8086 supports another mode of operation called ‘maximum mode’, in which it allows parallel connection and operation of co-processors like 8087, 8089 and similar. The physical pin diagram of the ‘minimum mode’ 8086 microprocessor is repeated in Fig-19.1. It has 40-pins and is accommodated in a CERDIP (CERamic Dual In Package) or plastic DIP package. The inline pins are separated from each other by 0.1-inch and offline pins are by 0.3 inch. The physical dimension of the 8086 is just 2-inch x 0.3-inch.

I've still got one of these, somewhere. It's got most of the components you talked about (no 8259, IIRC. My senior design project included implementing an interrupt controller with a couple of TTL chips.)

(and geez. Still obsessed with the BCD, huh... (I guess there's some value to seeing how it works on several different processors, once you've done one. But you've got 16bit registers, and 16bit math instructions including multply and divide. how about this oldie but goodie?)

ten     dw      10

decout  xor     dx,dx
        div     ten
        push    dx
        or      ax,ax
        jz      DECOU2
        call    decout
decou2: pop     ax
        add     al,'0'
        call    typchr


Z80 version, needs a bit of TLC.

Tom… :slight_smile: