Any way to use simple prescaler change like I did in this example for an individual channel?
Yes, on the Due it's possible to change the prescaler for each timer channel using the PWM Channel Mode Register (REG_PWM_CMRx).
This divides down the Due's master clock running at 84MHz:
To divide down by 2 on channel 0:
REG_PWM_CMR0 = PWM_CMR_CPRE_MCK_DIV_2;
PWM->PWM_CH_NUM[i].PWM_CMR = PWM_CMR_CPRE_MCK_DIV_2;
... does the same thing, but is useful if you're iterating throught a number of channels.
It's possible to divide down by 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, just by changing the divisor.
If you require more refinement to your clock frequency, it's possible instead to divide down the master clock (84MHz) using one of two clock sources: CLKA or CLKB, like I did with CLKA in the example above:
REG_PWM_CMR0 = PWM_CMR_CPRE_CLKA;
You can then optionally set a prescaler and divisor (or both) for either CLKA or CLKB in the PWM Clock Register (REG_PWM_CLK), for example:
REG_PWM_CLK = PWM_CLK_PREA(0) | PWM_CLK_DIVA(42); // Set the PWM clock prescaler and divisor (84MHz/42)
If DIVA or DIVB are 0 CLKA and CLKB are turned off respectively.
If DIVA or DIVB are 1 the respective clocks are prescaled by PREA or PREB.
If DIVA or DIVB are between 2-255 the CLKA and CLKB are divided by PREA or PREB then divided by DIVA or DIVB.
The prescalers PREA and PREB are 4-bit values that range from 0 to 15 and correspond to a prescaler of 1 through to 1024. For example PWM_CLK_PREA(5) will divide the master clock (84MHz) by 32.