Hi everyone! this is indeed a brand new world! (first post on the forum!... or actually in any forum!)
loving arduino Duemilanove (w ATMEGA328p). love the whole *.PDE , c++ libraries saving us all the b.... ache of going through datasheets and knocking our head on the wall!
That said, although great to do stuff fast, the catch is we lose a bit of control.
My previous experience was limited to PIC18. Where ISR levels could be defined and hence we could flag several interrupts and define a high priority one that would always take well.. priority.
going into the juicy bits:
-I have a timer (TMR1) clocking sequences of pulses out as a stimulus to another device. the timer overflow is generating a routine and on top of that I needed to have a second external interrupt routine to listen for a response.
sort of ... (pulse_count>mythreshold)? good_response:bad_response;
Now design wise I am not worried about the external interrupts being queued,its not time critical , as long as they are not lost. On the other hand the timed sequence (signal out of MCU) is something I don't wanna screw up as it messes the response.
Can i have the tmr1 ISR I already have being defined as high priority and an external INT0/INT1 as a low priority?
one more, I have ready most of docs on AVR i still dont get how does it work we dont have to clear any flags in the routine?
also I have a side question for the master Jedi's of embbedded stuff and AVR Freaks. A lot of real time code I have seen uses register setup of the form
REG &= ~(1<<bit); // Clear bit
REG |= (1<<bit); // set bit
Can you guys walk newbies trying to go into the deep end, apart from readibility is there any clock instructions savings, or any space savings, or safety benifit?
also in AVR arquitec is this bit shift having a carrier if a one is already stored in REG? and where is it temporarily written from?
Sorry prob a lot of questions for one post but here it is my first post...! =)