Hi,
I have two separate goals in mind tied to this basic problem.
The first goal is to create a predefined sequence of voltages between 0 and 5. To achieve this I generate sequences like 0011010101 and write each individual bit to each digital output and then send it to a r-2r ladder. This will lead to the desired sequence. I need this sequence to keep repeating. Currently I dont have problems with repeatation rates of about 500-1KHz , which is good enough for the present prototype but to reach ultimate goal of the project, I need to be able to do it atleast to rates of few hundred KHz.
The second goal is to develop what is called a Multi Channel Scalar. What is basically does is counts how many TTL pulses come in a given time bin, which can range from few ns to few seconds, and gives the counts over several such bins. I am not looking for the ns second area however, but something which ranges from tens of microseconds to some seconds. To do this I need a clock signal, a TTL counter and a trigger mechanism without jitter.
That is why I was asking if there is a generic architecture for reducing the jitter. For example the first program which I posted, I can put whatever I want between the two microsecond delay commands and hence it allows for a very generic architecture. Or if I have to go for a board with higher onboard clock to improve such generic architecture.
I hope things are a bit more clear now. Please let me know if you have more questions. 