Multiple SPI lanes / Faster SPI on Arduino

Hi everyone!
Its my first post here so please excuse potential rookie mistakes :slight_smile:

Im doing a project for university and looks like I will need more than one SPI lane.

The problem is that I have to read data from A/D converter and store it in RAM (23k256) - all over SPI.
I know that you can connect multiple devices over SPI - I want to get the most out of the ADC and I think connecting it to the same lane as my RAM would slow it down...

So here is the question:
Is there any feasible way to have two SPI lanes on Arduino?
Or is there a different way to increase SPI throughput? I currently read from the ADC at 126 kB/s
(I already did some changes to SPI library eg. replacing all "digitalWrite" with a much faster macro and changing SPI speed)

SPI Port can operate as high as 8 MHz speed (8 Mbits/sec). What is the type number of your ADC?

The ADC Im using is MCP3008

Milu_:
Or is there a different way to increase SPI throughput? I currently read from the ADC at 126 kB/s
(I already did some changes to SPI library eg. replacing all "digitalWrite" with a much faster macro and changing SPI speed)

This is the excerpt from the ADC's data sheets:
adc3008sck.png

Can you read data from the ADC at a clock rate (SCK) higher than 10 kHz (aka 10 kbits/sec)? The available division factors in the SPI.h Library are: 2, 4, 8, 16, 32, 64 or 128.

adc3008sck.png

Milu_:
Is there any feasible way to have two SPI lanes on Arduino?

Two SPI masters is possible, but it won’t make it any faster for two reasons:

  • Only one hardware SPI master is available, creating more only by bit-banging (software-emulation) you can.
  • All I/O is CPU-dependent, thus even two SPI masters would have been accessed sequentially anyways.

Milu_:
Or is there a different way to increase SPI throughput?

Since it’s a standard (sort of), adding lanes isn’t that simple; this is not PCI Express though.

And since this is a serial communication and no extra lanes can be added, your only option is increasing the bit rate which means increasing clock’s frequency.
The SPI master controller on an AVR micro can work at most at half the system’s frequency; so, as GolamMostafa said, 8 MHz (8 Mbit/s or 1 MB/s) maximum for most of the ATmega328P-based boards. Keep in mind this only accounts of an individual 8-bit “burst”; effective data rate is further decreased by any existing overhead (code execution in between transfers, busy slave, communication protocol such as commands and responses that aren’t part of the payload).

Milu_:
(I already did some changes to SPI library eg. replacing all “digitalWrite” with a much faster macro and changing SPI speed)

Only the second thing will help significantly because (again) the toggling on SCK and MOSI is done by hardware. Speeding up digitalWrite() I think just affects CS pin assertion/de-assertion.

GolamMostafa:
Can you read data from the ADC at a clock rate (SCK) higher than 10 kHz (aka 10 kbits/sec)? The available division factors in the SPI.h Library are: 2, 4, 8, 16, 32, 64 or 128.

It should. I’ve also found in the datasheet that the maximum frequency is 3.6 MHz at 5V; so a prescaler of 8 (2 MHz) is needed.

10 KHz is the minimum because of the type of ADC (successive approximation) and because looks like it doesn’t have it’s own oscillator, instead the SCK line feeds up the required clock signal.

The data sheets indicate that the ADC uses the SCK signal of the SPI for conversion purpose and also for clocking out the converted 10-bit data, which must be done within 1.2 ms. Therefore, the frequency of SCK signal ought to be: 1/(1.2 ms/10) = 8.3 kHz ==> 10 kHz.
dsheet.png

dsheet.png