I know DTR can be used for flow control (even though it should not). The theory is that DTR is being pulsed for flow control which leads to the odd low voltage you measured.
One terminal application may be a problem whereas another may not because of the way the application initializes or interacts with the serial port driver.
After some trouble shooting by some members and using a scope it was determined that the DTR pulse when turned off by IDE/AVRDUDE would generate a >+10vdc spike into the reset pin apparently putting the chip into partial HV programming mode and latching up until a manual reset was performed.
This is clearly what will happen when the diode is not on there. With DTR pulled Low, it only
takes a couple of msec for the cap to charge to near +5V, so when DTR goes back high, it
will drive the Reset pin to approx 10V, for at least a couple of msec.
oric_dan:
After some trouble shooting by some members and using a scope it was determined that the DTR pulse when turned off by IDE/AVRDUDE would generate a >+10vdc spike into the reset pin apparently putting the chip into partial HV programming mode and latching up until a manual reset was performed.
This is clearly what will happen when the diode is not on there. With DTR pulled Low, it only
takes a couple of msec for the cap to charge to near +5V, so when DTR goes back high, it
will drive the Reset pin to approx 10V, for at least a couple of msec.
Yes, a momentary voltage doubler circuit. HV programming is normally entered by applying a +12vdc level to the reset pin, but the +10vdc pulse seemed enough to seem to trigger that mode, at least that is the theory we came to except.
Lefty
Measuring with the scope, it does not appear to be pulsing. It is steady.
One terminal application may be a problem whereas another may not because of the way the application initializes or interacts with the serial port driver.
I'm using the Serial Monitor which we all know and love, and I don't believe that pulses DTR.
oric_dan:
This is clearly what will happen when the diode is not on there. With DTR pulled Low, it only
takes a couple of msec for the cap to charge to near +5V, so when DTR goes back high, it
will drive the Reset pin to approx 10V, for at least a couple of msec.
Pfft. Does that mean all my "minimal" board designs are wrong because they don't have the diode? Will any small diode do? Like a 1N4148?
Pfft. Does that mean all my "minimal" board designs are wrong because they don't have the diode? Will any small diode do? Like a 1N4148?
Not wrong, just vulnerable. As I said there had to be a certain hardware precondition on specific input pins, which in it's simplest form could be created with a 4.7K pull-up resistor on pin 4 or 5 I forget which. There was a pretty long posting page that covered all the learning that went through the effort by several members to try and understand it. Keep in mind that this condition existed for several years sense auto-reset was implemented without being noticed. But once I was able to recreate the symptom on my own board and saw a picture of the scope picture someone posted showing the reset reset signal going from ground to +10vdc for a short time before settling in at +5vdc I was convinced that the diode was necessary insurance. You can note that the reset pin is the only AVR pin that does not have an internal positive clamping diode installed as it needs to be able to handle +12vdc as a means to enter HV programming mode.
Again I don't know if this specific bug would effect mega1280/2560 or the xU2 series of chips, but I do note that arduino does add the diode to most their boards after being presented the evidence of the symptom. So you think arduino folks added the diode for cosmetic effect only. 
And yes a 1N4148 will do the job.
Lefty
Docedison:
just a crazy random thought, but what happens to the reset voltage when you close the monitor?
I added a "heartbeat" LED which flashes every time through "loop".
It was the absence of flashes once I opened the serial monitor that alerted me to this issue. Once I close the serial monitor it starts flashing again. Of course, I can't see the output now.
retrolefty:
After some trouble shooting by some members and using a scope it was determined that the DTR pulse when turned off by IDE/AVRDUDE would generate a >+10vdc spike into the reset pin apparently putting the chip into partial HV programming mode and latching up until a manual reset was performed.
I'm probably not doing this right, but I can't reproduce that.
I have a 0.1 uF capacitor (as in the reset circuit) and on the "other" side a 10K pull-up to +5V, same as in the circuit. I feed in a 1 Hz +5V pulse (as if DTR were being asserted and de-asserted) and all I see is reset being pulsed in the usual way. That is followed by a negative pulse, but not a +10V one.
The yellow trace is the DTR "pulse", the blue one on the other side of the capacitor.
And more clearly, without the input pulse:
I take that back, because I had foolishly forgotten to turn on my power supply, so there was no +5V pull-up. With it on, I get this:
Zooming in on it:
So, a 9.84V spike.
And with the 1N4148 diode in place:
Oh well, I'm learning about reset circuits a bit more. 
That is how science is suppose to work!
hiduino:
Check your reset capacitor for shorts.
The capacitor measures 341K across its terminals, which sounds OK doesn't it?
Are you saying 341K ohms, really? Sounds like a bad capacitor (if it was tested out of circuit).
If you are testing with a multimeter, it would read something low only for a few seconds or so until the capacitor charges up, but it should read infinite afterwards.
341 K ohms, yes. But it was in-circuit, wouldn't it find a path through the DTR line on the FT232 chip, and around through the processor, to give a few hundred K resistance? At least it wasn't shorted out.
341K does not sound unreasonable for one side of the cap being a diode going to +5 and the other side being the DTR output of the FTDI chip, which provides an internal pathway to +5/Gnd, as does the Reset pin of the '2560 and whatever other chips Reset goes to.
Well I worked it out, and I'll document it here in case it helps someone else.
To recap the symptoms:
This was the reset circuitry, which should have isolated RESET from DTR. The DTR line is the one brought low by the serial monitor, however the capacitor should have only allowed a pulse through.
A bit of arithmetic showed that the logical explanation for 1.6V on /RESET would be if it was part of a voltage divider, where the "upper" side was 10K and the lower (Gnd) side was 4.7K.
voltage = 4700 / (10000 + 4700) * 5 = 1.6
So basically I needed to find a 4.7K resistor that magically switched itself into circuit when /RESET was pulsed low. And switched itself out when /RESET was pulsed high.
A closer look at the circuit (which I didn't personally design) showed this part, a level shifter which was intended to let the main processor talk via SPI to a transmitter board:
/RESET was going into that chip, however as an input, surely?
Then I read the datasheet for the TXB0106 chip:
Architecture
The TXB0106 architecture (see Figure 1) does not require a direction-control signal to control the direction of data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0106 can maintain a high or low, but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts flowing the opposite direction.
The output one shots detect rising or falling edges on the A or B ports. During a rising edge, the one shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly, during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up the high-to-low transition. The typical output impedance during output transition is 70 ? at VCCO = 1.2 V to 1.8 V, 50? at VCCO = 1.8V to 3.3V and 40? at VCCO =3.3V to 5V.
Interesting! This chip detects and latches level-changing edges.
The architecture of the chip is shown here:
Note the 4K resistors (circled).
So my theory is now:
DTR is brought low temporarily (by connecting the serial monitor)
This pulses reset strongly for a moment, through the capacitor
The TXB0106PWR buffer chip then decides to "maintain" that signal, weakly, however it is stronger than the 10K pull-up which is there (I calculated that it is, in effect, around a 4.7K resistance, hence the 1.6V)
Reset stays at 1.6V indefinitely
When the serial monitor is closed DTR goes high which pulses a strong high signal through the capacitor
The TXB0106PWR now maintains this new level
In effect, this:
The temporary solution was to cut the trace leading to the TXB0106 pin handling /RESET.
A more permanent one would be, I think, to install another capacitor (circled):
That would let the reset pulse through to the level shifter, but not let the level shifter hold reset low.
Nice work Nick. Would be nice to be able to add a cap & confirm - too bad this SMD stuff is such a pain in the ass to rework a change in.
Is the lack of reset to the DNT24C going to be a problem?
I see a good lesson learned here - don't use TXB01xx for Reset signal.
I'm presuming the DNT24C will reset anyway on power up, and as there isn't a reset button, the difference is probably low. It just means that when you open the serial monitor, it won't reset.
So subject to testing, it might be simpler to simply omit it (the connection to reset). Alternatively, bring the DNT24C reset to a processor pin and let the processor reset it under CPU control, not just when DTR is asserted.
Those would be my choices. The arduino reset circuitry has undergone several changes over the years and every 'fix' or 'improvement' seems to just kick the can down the road to new problems. Wiring anything to the existing arduino reset circuitry is just like kicking a sleeping dog, one will regret that practice sooner or later.
Lefty
