I have a few ENC28J60 kicking around and hoping to hand wire an Ethernet shield on a protoboard. Looking at the official Ethernet shild and the UNO I have some question regarding the header pinout.
Why does the Ethernet shield use the ICSP header when SPI is duplicated on digital pins 11, 12, and 13?
Why does the UNO add two more pins to the digital header for SCL and SCA when the same is already available on the analog header?
It really makes little sense to me to break out the same processor pin on multiple header pins. You an only make use of the processor pin once. Obviously I must be missing something that explains this.
My take is that it has to do with Mega compatibility (and future compatibility). On a Mega, the SPI pins and I2C pins are in a different place. The ICSP header, however, is in the same place on both boards thus allowing the Ethernet shield to work with both. By adding two pins to the digital header and calling them "SCL and SDA" future boards will have to route the I2C signals to these pins, no matter where they come from, once again improving shield compatibility.
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