USART TX COMPLETE

Hi,

I would like to know how can I know when the transmist buffer has finished.
I need it to control a pin for RS485 communications (half duplex communication).

I´ve read in the datasheet that the UCSR0A register has a bit (TXC0) with this info. But it´s automatically cleared when the interrupt is executed. Is this interrupt used in wiring?

Can I use something like this?
flag_finish_tx= (UCSR0A & (1 << TXC0))

Thank you!! :wink:

Regards,

Igor R.

First, the Arduino/wiring does not normally use ANY interrupts for transmit.

Second, the "normal" bit for running an interrupt driven transmitter is the UDREn (USART Data Register Empty) bit and interrupt, which happens when data moves form the data register to the shift register, while the Transmit Complete interrupt happens when the shift register becomes empty.

So the point is that for most normal software, you should be safe using the TXCn bit to check for done...

Hi,

Thank you for your reply.

Looking into HardwareSerial, wiring_serial,… I didn´t find nothing with tx interrupt, but I want to be sure…

I´ve changed my code using this and it works good. I´ve checked with oscilloscope.

void sendMSG(byte address1,byte address2,byte data_type,byte code1,byte code2,byte Sign,byte data1,byte data2,byte data3,byte data4){
  
  unsigned int checksum_ACK;
  checksum_ACK=address1+address2+5+data_type+code1+code2+Sign+data1+data2+data3+data4+3;
  
  UCSR0A=UCSR0A |(1 << TXC0);
  
  digitalWrite(pinCONTROL,HIGH);
  delay(1);
  Serial.print(0,BYTE); 
  Serial.print(address1,BYTE);
  Serial.print(address2,BYTE);
  Serial.print(5,BYTE);
  Serial.print(data_type,BYTE);
  Serial.print(code1,BYTE);
  Serial.print(code2,BYTE);
  Serial.print(Sign,BYTE);
  Serial.print(data1,BYTE);
  Serial.print(data2,BYTE);
  Serial.print(data3,BYTE);
  Serial.print(data4,BYTE);  
  Serial.print(3,BYTE);
  Serial.print(((checksum_ACK>>8)&255),BYTE);
  Serial.print(((checksum_ACK)& 255),BYTE);
  while (!(UCSR0A & (1 << TXC0)));
  digitalWrite(pinCONTROL,LOW);

  
  
}

Regards,

Igor R.