The problem with the erratic response is probably due to signal degradation - as the clock and data
signals move from unit to unit there will be degradation particularly of the clock signal - fast logic signals are
not designed to travel more than a foot or so without some sort of conditioning either at sending end
or receiving end or both.
I would suggest adding 100 ohms in series with the clock signal at receiving end of every cable run, and
using a lower data rate. If the cable runs are more than a few metres you really need to use a physical
signalling method designed for distance, such as RS485.
Regenerating the clock signal at each stage with a buffer is a very good idea - the data already gets
regenerated by the shift register.