Watchdog timer (interrupt mode) related question

you configure your watchdog timer through the WDTCSR register but in order to enable a safety setup mode for this register's configuration (that will last 4 clock cycles) you set WDCE and WDE high before attempting any changes to the watchdog register.

so the real changes are

WDTCSR = bit (WDIE) | bit (WDP3) | bit (WDP0);    // set WDIE, and 8 seconds delay

EDIT: I found where I made a note from this

read Tutorial: Basic Watchdog Timer Setup and the attached PDF