So, I posted this question over at the ESP8266 forum. But, it doesn't seem to be getting any traction. I'm hoping maybe here, with the larger audience, someone might be able to explain how it works. I've also attached the device datasheet downloaded from ESP8266.com.
I’ve been successfully using the Arduino IDE to program a couple of ESP8266 boards (Adafruit Huzzah Feather, Sparkfun ThingDev) as application processors for several months now. Works great, I loving having native WiFi and SPIFFS available to my applications.
Just recently I’ve started wondering exactly how this works. Meaning from where is my application executing? The ESP8266 has no internal EEPROM, so my application is stored in external SPI Flash -- Understood. Upon power-up / reset the application is loaded via SPI into the ESP8266 for execution -- Understood. But where exactly? I don’t see a Code Space RAM in the block diagram. Is it the SRAM? How big is the SRAM is and how large a sketch can it hold? I assume (hope) that there are no instruction fetch operations from the Flash via SPI because that would be SLOW.
I’d appreciate any insight into how it really works.
Thanks.
0a-esp8266_datasheet_en_v4.3.pdf (810 KB)
gfvalvo:
So, I posted this question over at the ESP8266 forum. But, it doesn't seem to be getting any traction. I'm hoping maybe here, with the larger audience, someone might be able to explain how it works. I've also attached the device datasheet downloaded from ESP8266.com.
I’ve been successfully using the Arduino IDE to program a couple of ESP8266 boards (Adafruit Huzzah Feather, Sparkfun ThingDev) as application processors for several months now. Works great, I loving having native WiFi and SPIFFS available to my applications.
Just recently I’ve started wondering exactly how this works. Meaning from where is my application executing? The ESP8266 has no internal EEPROM, so my application is stored in external SPI Flash -- Understood. Upon power-up / reset the application is loaded via SPI into the ESP8266 for execution -- Understood. But where exactly? I don’t see a Code Space RAM in the block diagram. Is it the SRAM? How big is the SRAM is and how large a sketch can it hold? I assume (hope) that there are no instruction fetch operations from the Flash via SPI because that would be SLOW.
I’d appreciate any insight into how it really works.
Thanks.
That microprocessor is a custom SoC using the Tensilica Xtensa lx106 MCU. It is designed to operate using an External SPI FLASH chip.
Daniel Casner shown here:
has written a good explanation here:
Guidelines for writing code for the ESP8266.
He discusses the architecture of the ESP8266 and how the it impacts code construction.
Follow his links about the Tensilica MCU for a deeper understanding.
Chuck.
