When I made a software implementation of I2C bus for an ATmega328P-based Arduino project I found out that open drain output easily can be emulated by switching tri-stat GPIO from active low (actively driven to GND) to Hi-Z state (pulled up by an external or internal resistor) and back as necessary.
This fact lead me to a question: why would anyone need true open drain GPIO? Many MCUs like ESP8266/ESP32 and most STM32's have configurable pins which can be set to be either tri-state ("normal") or open drain, but I wonder what's the point in the latter option, taking into consideration how easily tri-state can emulate open drain behavior. Does it have anything to do with switching speed? Or rather with connecting devices rated for different voltages to a single I2C bus?
Also, if I get it right, configuring GPIO as an open drain output just means that one of the totem pole transistors inside an MCU is disabled. Therefore when remaining transistor is closed, the situation seems to be pretty similar to Hi-Z state.
P. S. For the avoidance of doubt, I have a clear idea about why open drain behavior is necessary (especially for I2C bus) and why hardware I2C pins always have open drain outputs. My question is related to GPIOs being configured as "true" (not emulated by tri-state) open drain outputs .
But software implementations is a software implementation regardless of whether GPIO is configured as tri-stat or as open drain. When I said "true open drain" I meant "a regular GPIO configured as open drain" in contrast to "a regular GPIO configured as tri-state and switched between being actively driven to GND and being set to Hi-Z".
Difference between dedicated hardware I2C pins and GPIOs configured as open drain for software implementation of I2C is out of scope.
That would not be a true open drain configuration. True open drain outputs are commonly used on sensors, as they facilitate communication between devices operating on different voltages. Ground must be common.
Sure, not very common right? Different supply voltages have already been mentioned. Usually, if some external high voltage device is involved, an external MOSFET is tacked on to handle that.
Are you sure about the "true open drains" on STM and ESP devices? I think not true of any STM device I've ever seen except IIRC the STM8. Can you prove this with some reference?
ESP8266 technical reference mentions open drain as a GPIO option at p. 75 and 113.
STM32F411x technical reference mentiones open drain as a GPIO option at p. 145 and 151.
Well, it's what I consider to be "true open drain". Not part of I2C dedicated hardware. Just a normal GPIO, but with an open drain output.
But on p.145 it's said to be "Subject to the specific hardware characteristics of each I/O port listed in the datasheet" so you have to look there. Also look at the output driver configuration in Fig. 16 on p.146.
I think it can be configured open drain, but not "true open drain".
With configurable GPIO outputs, what they call "open drain" is almost certainly an output in which the current sourcing MOSFET is disabled. Such an output would probably not be able to withstand voltages much higher than Vcc.
With something like the ESP8266, it is almost impossible to get definitive answers about the hardware, so you are taking your chances if the voltage on the external device exceeds Vcc.
On an AVR, it's about the same difficulty to switch a pin from Input to active low as it is to output ones and zeros. But on many chips, changing the "pin configuration" is substantially more difficult, and may involve a slower bus.
And you'd rather be able to use a nice sensible API like digitalWrite() regardless of pin configuration, rather than make digitalWrite() even slower than it us now by having to check whether it's doing "real" IO or "open drain" IO...
