7 segment display, 12 digit multiplexing

Forum 2005-2010 (read only) Hardware Interfacing
1

I am trying to draw up a schematic for running 3x 4 digit 7 segment CA displays. I think I've got this right, but would like to make sure I am on the correct thought train.

First, for the segment specs:
Forward Voltage: 2.1 or 3.4 V
Max forward current: 20uA

I haven't yet decided if I'm going to plex the digits or the segments. I would prefer to plex the segments to keep a flicker down, but it seems more realistic to plex the digits with a multiplex chip or shift register on the segments. I suppose I could daisy chain 2 registers for the digits, but that seems excessive.

Is the below correct?

Plexing Either:
Source pin to NPN Base
Vcc to NPN Collector
Digit Anode to NPN Emitter

Sink pin to PNP Base
Segment Cathode to PNP Emitter
GND to PNP Collector

Minimum Resistor @ 2.1 Forward Volts: 145 Ohm (5-2.1) / .02
Minimum Resistor @ 3.4 Forward Volts: 80 Ohm (5-3.4) / 0.02

Plexing Digits (Turning on one digit at a time):
Source/Drain current Max: 160mA (20mA/segment * 8)
1 Resistor per segment

Plexing Segments (Turning on one segment at a time):
Source/Drain current Max: 240mA (20mA/digit * 12)
1 Resistor per digit

As an offshoot question, can I emulate PWM by port manipulation? If I can, how will that work with a transistor either sourcing or sinking current?

2

You meant mA not uA for the segment max current spec!

I'd tend not to use emitter followers like this - the voltage drop across them might be too high to drive 3.4V LEDs and the power dissipation will be shared between resistor and transistor in a manner too dependent on the transistor gain. Prefer to use a common-emitter drive (remember this will invert the sense of the output).

For driving the digits common anodes, use PNP, connect shift-register output to base via resistor, emitter to Vcc, collector to the digit's common anode. Arduino pins can drive 20mA direct so they can go to the multiplexed segments so long as you only drive one digit at a time. Multiplexing the segments is easy to code since a byte contains 7 segment bits and a decimal point bit, simple lookup table will work.

If the total digit current is 160mA and transistor has beta >= 100, then 2k2 base resistor should work, play safe with one a bit lower to ensure saturation...

Remember in this setup all outputs are active low - with common cathode and NPN transistors all outputs would be active high.

You could try both common-emitter and emitter-follower and compare. The emitter follower voltage drop is the sum of forward-biased base-emitter junction (0.7V) & the driving logic gate's voltage droop (TTL spec'ed parts might be bad for this). With common emitter the voltage drop is 0.3V and no sensitivity to driving gate's voltage droop.

The only downside to common emitter circuit is slower switching, but you'd need to get to 100kHz and above to see this.

3

The only downside to common emitter circuit is slower switching

Tosh!! Why is this slower?

With common emitter the voltage drop is 0.3V

No it's 0.7V unless you are using the almost unseen germanium transistor.

4

If you're talking about three 4-digit displays, you might consider a modular approach --> three individual 4-digit display modules on a 5-pin buss.

Here's a 4 module 4-digit (5 column) example that uses a 6-pin buss. It has a 1/5th or 20% LED duty cycle and might deliver approximately 5-6 ma "average" current per LED. If you need more brightness (more "average" current) then replace the 'HC595 with a higher current TPIC6C595 or some other high current serial-to-parallel sinking driver IC or a constant current sinking driver IC.

Regards, Mike

Here's what an individual module might look like. The 74HC595 pin on each module would be connected to a unique line (1 through 4) on the buss. The PWM module is setup with a period equal to the digit update interval to provide complete fade-to-black brightness control but it also allows us to re-task the column driver lines for use as and lines to load 32 bits of data into the shift registers during a short blanking interval at the beginning of each column update interval when PWM is high (display "off").

5

I'd tend not to use emitter followers like this - the voltage drop across them might be too high to drive 3.4V LEDs and the power dissipation will be shared between resistor and transistor in a manner too dependent on the transistor gain. Prefer to use a common-emitter drive (remember this will invert the sense of the output).

For driving the digits common anodes, use PNP, connect shift-register output to base via resistor, emitter to Vcc, collector to the digit's common anode. Arduino pins can drive 20mA direct so they can go to the multiplexed segments so long as you only drive one digit at a time. Multiplexing the segments is easy to code since a byte contains 7 segment bits and a decimal point bit, simple lookup table will work.

If the total digit current is 160mA and transistor has beta >= 100, then 2k2 base resistor should work, play safe with one a bit lower to ensure saturation...

Do you have any suggested reading so I can understand what you said?

Are you saying to swap around my transistors (PNP on Anode, NPN on Cathode)?

Just to make sure that I'm thinking about this right:
On a common anode display, the digit pin is the anode, and each of the segments are the cathodes. Assuming I am only running one digit, max current for the anode is 160mA and each segment is 20mA?

If you're talking about three 4-digit displays, you might consider a modular approach --> three individual 4-digit display modules on a 5-pin buss.

If I am reading this correct, you are suggesting to tie each digit to the corresponding digit on the other displays and using a shift register for each display?

If I'm reading this right, tying SER and SCK to digit pins, you're dumping data into the shift register but not latching it into the storage. During data transfer to the registers, OE goes high keeping the display blank while loading data off the digit lines.

What happens when PWM OE for dimming? is port manipulation/PWM fast enough that RCK doesn't trigger? Do I just have to keep the PWM pulses under 20ish ns to keep it from tripping? isn't 1 clock cycle (@ 16MHz) like 600 something ns?