I managed to get it to sync.
The problem was my 3.5" LCD-TV. I replaced it with a 5" LCD-TV and it syncs both with NTSC and PAL modes.
Now I have a 40x25 textmode output.
Yes, it supports a graphicsmode of 160x100 with a character ROM set containing 2x4 blockdrawing characters.
Using the UART in SPImode, I noticed no 9th bit problem. It shifts 8bits/byte.
Because the pixel Clock is 8MHz I'm now struggling with loading a videoshift byte in just 16 clockcycles.
It may have to be done with inline assembly but I have no idea how to get a pointer to my videoRAM/charROM passed to the inline assembly code.
A very special extra role is defined for the register pairs R26:R27, R28:R29 and R30:R31. The role is so important that these pairs have extra names in assembler: X, Y and Z. These pairs are 16-bit pointer registers, able to point to adresses with max. 16-bit into SRAM locations (X, Y or Z) or into locations in program memory (Z).
The lower byte of the 16-bit-adress is located in the lower register, the higher byte in the upper register. Both parts have their own names, e.g. the higher byte of Z is named ZH (=R31), the lower Byte is ZL (=R30). These names are defined in the standard header file for the chips. Dividing these 16-bit-pointer-names into two different bytes is done like follows:
.EQU Adress = RAMEND ; RAMEND is the highest 16-bit adress in SRAM
LDI YH,HIGH(Adress) ; Set the MSB
LDI YL,LOW(Adress) ; Set the LSB
Accesses via pointers are programmed with specially designed commands. Read access is named LD (LoaD), write access named ST (STore), e.g. with the X-pointer:
X Read/Write from adress X, don't change the pointer LD R1,X
X+ Read/Write from/to adress X and increment the pointer afterwards by one LD R1,X+
-X Decrement the pointer by one and read/write from/to the new adress afterwards LD R1,-X
Similiarly you can use Y and Z for that purpose.
There is only one command for the read access to the program storage. It is defined for the pointer pair Z and it is named LPM (Load from Program Memory). The command copies the byte at adress Z in the program memory to the register R0. As the program memory is organised word-wise (one command on one adress consists of 16 bits or two bytes or one word) the least significant bit selects the lower or higher byte (0=lower byte, 1= higher byte). Because of this the original adress must be multiplied by 2 and access is limited to 15-bit or 32 kB program memory. Like this:
Following this command the adress must be incremented to point to the next byte in program memory. As this is used very often a special pointer incrementation command has been defined to do this:
ADIW means ADd Immediate Word and a maximum of 63 can be added this way. Note that the assembler expects the lower of the pointer register pair ZL as first parameter. This is somewhat confusing as addition is done as 16-bit- operation.
The complement command, subtracting a constant value of between 0 and 63 from a 16-bit pointer register is named SBIW, Subtract Immediate Word. (SuBtract Immediate Word). ADIW and SBIW are possible for the pointer register pairs X, Y and Z and for the register pair R25:R24, that does not have an extra name and does not allow access to SRAM or program memory locations. R25:R24 is ideal for handling 16-bit values.
As incrementation after reading is very often needed, newer AVR types have the instruction
This allows to transport the byte read to any location R, and auto-increments the pointer register.