arduino due microcontroller (AT91SAM 3 * 8E) External Memory Interface

Dear Sir/Madam,

We have purchased arduino due microcontroller (AT91SAM 3 * 8E).

Our memory requirement has for SRAM is increased from 96 KBytes to 4 MBytes. Can you please tell us what are the ways to increased SRAM memory.

Is there is an option to connect external memory.

Waiting for your response.

Regards
Monika

hi

Start by reading the AT91SAM datasheet - does it offer address/data pins/control lines that will extend the memory space?
If it does, does Due design make those pins accessible?

If not, can you live with SRAM that is accessed by SPI? This will be just straight storage space that you would access thru SPI calls.

I must have looked into this before, as I came across this drawing I did, and the following in the datasheet. Need to bounce these ports against the Due schematic and see if all pins are accessible. Not sure where I found the pins/ports info, it was back in June.

9.2 External Memories
The 144-pin SAM3X and 217-pin SAM3X8H(1) feature one External Memory Bus to offer interface
to a wide range of external memories and to any parallel peripheral.
Note: 1. This device is not commercially available. Mounted only on the SAM3X-EK evaluation kit.
9.2.1 External Memory Bus
• Integrates Four External Memory Controllers:
– Static Memory Controller
– NAND Flash Controller
– SLC NAND Flash ECC Controller
– Single Data Rate Synchronous Dynamic Random Access Memory (SDR-SDRAM)
• Up to 24-bit Address Bus (up to 16 MBytes linear per chip select)
• Up to 8 chip selects, Configurable Assignment
9.2.2 Static Memory Controller
• 8- or 16-bit Data Bus
• Multiple Access Modes supported
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
Multiple device adaptability
– Control signals programmable setup, pulse and hold time for each Memory Bank
• Multiple Wait State Management
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
• Slow Clock mode supported

arduino-Due-schematic.pdf (67.2 KB)

Hi Monika,

An SPI serial SRAM would suffice as termed by Mr. CrossRoads but still can you tell what sort of application is taking all that RAM? Grpahics? PLC?

A rule of thumb while programming embedded systems and getting low on memory is to check your variable defintions ,are you using all of it as needed? I mean using declaring the varibales that can go in flash and using an 8 bit int rather than the conventional 16bit or 32 bit one (based on the compiler) may workout things.

Dear Sir,

I have written code for interfacing external memory device (HM62V16100I) with arduino due micro controller.
I am writing 10 different data (from a to j) on 10 different address location.
& I wanted to read the same data (from a to j) when I am doing the read operation from memory.

But what i am seeing only the last data (j) is coming 10 times.(may be i am reading the ports).

How to read external memory device.Do we need to enable something.

I am not sure port register that i have used is correct.

can you please tell me how to interface external memory device from arduino due microcontroller. I urgently need that code.

/*********************************************IO

SIGNALS********************************************

LIBS SIGNAL#######

PB15----LIBS_DATA(INPUT TO uC)

PB12----TC_SERIAL_DATA(OUTPUT)

PA0----TC_TRP_PULSE(OUTPUT)

PB13----TC_SERIAL_CLOCK(OUTPUT)

PB25----DH_DATA_READ_ENABLE(OUTPUT)

PB26----DH_MODE(OUTPUT)

PB27----DH_CLOCK(OUTPUT)

PB16----LIBS_DATA_READY(INPUT)

PB14----LIBS_ON_OFF(INPUT)

SRAM memory ADDRESS#####

PC1----SRAM ADDRESS:AD0(OUTPUT)

PC2----SRAM ADDRESS:AD1(OUTPUT)

PC3----SRAM ADDRESS:AD2(OUTPUT)

PC4----SRAM ADDRESS:AD3(OUTPUT)

PC5----SRAM ADDRESS:AD4(OUTPUT)

PC6----SRAM ADDRESS:AD5(OUTPUT)

PC7----SRAM ADDRESS:AD6(OUTPUT)

PC8----SRAM ADDRESS:AD7(OUTPUT)

PC9----SRAM ADDRESS:AD8(OUTPUT)

PC12----SRAM ADDRESS:AD9(OUTPUT)

PC13----SRAM ADDRESS:AD10(OUTPUT)

PC14----SRAM ADDRESS:AD11(OUTPUT)

PC15----SRAM ADDRESS:AD12(OUTPUT)

PC16----SRAM ADDRESS:AD13(OUTPUT)

PC17----SRAM ADDRESS:AD14(OUTPUT)

PC18----SRAM ADDRESS:AD15(OUTPUT)

PC19----SRAM ADDRESS:AD16(OUTPUT)

PC21----SRAM ADDRESS:AD17(OUTPUT)

PC22----SRAM ADDRESS:AD18(OUTPUT)

PC23----SRAM ADDRESS:AD19(OUTPUT)

SRAM memory DATA#####

PD0----SRAM DATA:D0(IN/OUTPUT)

PD1----SRAM DATA:D1(IN/OUTPUT)

PD2----SRAM DATA:D2(IN/OUTPUT)

PD3----SRAM DATA:D3(IN/OUTPUT)

PD4----SRAM DATA:D4(IN/OUTPUT)

PD5----SRAM DATA:D5(IN/OUTPUT)

PD6----SRAM DATA:D6(IN/OUTPUT)

PD7----SRAM DATA:D7(IN/OUTPUT)

PD8----SRAM DATA:D8(IN/OUTPUT)

PD9----SRAM DATA:D9(IN/OUTPUT)

PD10----SRAM DATA:D10(IN/OUTPUT)

PC24----SRAM DATA:D11(IN/OUTPUT)

SRAM memory Control lines#####

PC28----SRAM CONTROL:WE bar(OUTPUT)

PC25----SRAM CONTROL:OE bar(OUTPUT)

PA19----SRAM CONTROL:UB bar(OUTPUT)

PA20----SRAM CONTROL:LB bar(OUTPUT)


*****/

#include <asf.h>

/*******************************FUNCTIONS FOR

UART*****************************************************/
void uart_ini(void);
void uart_tx(unsigned char DATA);
unsigned char uart_rx(void);

unsigned char LIBS_DATA[88625];// this memory location used to store the LIBS data
//unsigned char LIBS_DATA[88835];// this memory location used to store the LIBS data
union int_char // this union is used to convert int val to two char or two char to int
{
unsigned int ival;
unsigned char cval[2];
}conv;

unsigned long cycle_count=0;
unsigned long data_cycle=0;
unsigned long data_count=0;
unsigned long pulsenum=0;
unsigned long r;
unsigned char chr=0;
unsigned long t=0;
unsigned long DATA0_10=0,DATA24=0,DATA_12=0;
unsigned long ADD=0,ADD1_9=0,ADD12_19=0,ADD21_23=0;
unsigned long ADD_TEMP=0;
unsigned long count=0;
int main (void)
{
//unsigned int p;
sysclk_init();// system clock enable
board_init();// board function enable

/********************************POAR C I/O

configuration******************************/
/********************************prg for o/p address

lines*****************************/
/********************************PC24 as i/o lines initially made as

o/p***************/
REG_PIOC_WPMR=0x50494F00;
REG_PIOC_PER=0x13EFF3FE; //0x12EFF3FE;
REG_PIOC_PDR=0xEC100C01; //0xED100C01;
REG_PIOC_OER=0x13EFF3FE; //0x12EFF3FE
REG_PIOC_ODR=0xEC100C01; //0xED100C01;
REG_PIOC_IDR=0xFFFFFFFF;
REG_PIOC_OWER=0x13EFF3FE; //0x12EFF3FE
REG_PIOC_PUDR=0x13EFF3FE;
REG_PIOC_PUER=0x00000000;
REG_PIOC_CODR=0x13EFF3FE;
// clear all output pin

/******************************** I/O configuration as per new

console**********/
REG_PIOB_WPMR=0x50494F00;
REG_PIOB_PER =0x0E01F000;
REG_PIOB_PDR=0xF1FE0FFF;
REG_PIOB_OER=0x0E003000;
REG_PIOB_ODR=0xF1FFCFFF;
REG_PIOB_IDR=0xFFFFFFFF;
REG_PIOB_OWER=0x0E003000;
REG_PIOB_PUDR=0x0E003000;
REG_PIOB_PUER=0x0001C000;
REG_PIOB_CODR=0x0E003000;// clear all output pin

REG_PIOA_WPMR=0x50494F00;
REG_PIOA_PER =0x00188000;
REG_PIOA_PDR=0x00008000; //**
REG_PIOA_OER=0x00180000;
REG_PIOA_ODR=0x00008000; //**
REG_PIOA_IDR=0xFFFFFFFF;
REG_PIOA_OWER=0x00180000;
REG_PIOA_PUDR=0x00180000;
REG_PIOA_PUER=0x00008000; //**
REG_PIOA_CODR=0x00180000;// clear all output pin

/********************************POAR C I/O

configuration******************************/
/********************************prg for I/O lines initially made as

o/p*****************************/
REG_PIOD_WPMR=0x50494F00;
REG_PIOD_PER=0x000007FF;
REG_PIOD_PDR=0xFFFFF800;
REG_PIOD_OER=0x000007FF;
REG_PIOD_ODR=0xFFFFF800;
REG_PIOD_IDR=0xFFFFFFFF;
REG_PIOD_OWER=0x000007FF;
REG_PIOD_PUDR=0x000007FF;
REG_PIOD_PUER=0x00000000;
REG_PIOD_CODR=0x000007FF;

uart_ini();// uart function initialization

while(1)
{

chr=uart_rx();

if(chr=='n')
{

chr=uart_rx();
chr=0;
t = 1 ;
}
if (t == 1) {
ADD= 0x00000000; //(write opeation)
chr = 'a';
REG_PIOC_SODR|=0x02000000 ; //memory OE bar (for read

& write)
REG_PIOC_SODR|=0x10000000 ; //memory WE bar (for writing)
for (cycle_count=0;cycle_count<10; cycle_count++) {

for(r=0;r<10000;r++);

/write into memory start****/
ADD1_9=(ADD&0x000001FF)<<1;
ADD12_19=(ADD&0x0001FE00)<<3;
ADD21_23=(ADD&0x000E0000)<<4;

REG_PIOC_ODSR=(ADD1_9|ADD12_19|ADD21_23); //Addressing processing

REG_PIOC_CODR|=0x10000000 ; //memory WE bar (for writing)

REG_PIOD_ODSR= chr; //data i/p-o/p

REG_PIOC_SODR|=0x10000000 ; //memory WE bar (for writing)

chr ++;

ADD ++;

}

ADD= 0x00000000;
/******make i/O lines as i/p (read opeation) *****************/
REG_PIOD_OER=0x00000000;
REG_PIOD_ODR=0xFFFFFFFF;

for (cycle_count=0;cycle_count<10; cycle_count++) {

ADD1_9=(ADD&0x000001FF)<<1;
ADD12_19=(ADD&0x0001FE00)<<3;
ADD21_23=(ADD&0x000E0000)<<4;

REG_PIOC_ODSR=(ADD1_9|ADD12_19|ADD21_23);

for(r=0;r<10000;r++);
REG_PIOC_CODR|=0x02000000 ;//memory OE bar (for read & write)

conv.ival=REG_PIOD_ODSR; //data i/p-o/p

REG_PIOC_SODR|=0x20000000 ; //memory WE bar (for reading)

ADD ++;

uart_tx=conv.cval[1];
uart_tx=conv.cval[0];
conv.cval[1]=0;
conv.cval[0]=0;
conv.ival=0;

} t = 0;

}

}
}

void uart_ini(void)
{
REG_PIOA_WPMR =0x50494F00;
REG_PIOA_PER|=0x00000c00;
REG_PIOA_PDR|=0x00000300;
REG_PIOA_OER|=0x00000200;
REG_PIOA_PUDR|=0x00000200;
REG_PIOA_PUER|=0x00000100;
REG_PIOA_ODR|=0x00000100;
REG_PIOA_ABSR=0x00000000;
REG_UART_CR=0x00000000;
REG_UART_CR=0x00000050;
REG_UART_MR=0x00000800;
REG_UART_IER=0x00000000;
REG_UART_IDR=0xFFFFFFFF;
REG_UART_BRGR=0x0000002E;
//REG_UART_BRGR =0x00000017;
}
void uart_tx(unsigned char DATA)
{
while(!(REG_UART_SR&0x00000002));
REG_UART_THR=DATA;
}

unsigned char uart_rx(void)
{
unsigned char DATA;
while(!(REG_UART_SR&0x00000001));
DATA=(unsigned char)REG_UART_RHR;
return DATA;
}

Regards
Monika