ATmega328P-AU Design Consideration Questions

Projects General Guidance
1

I'm attempting to incorporate an ATmega328P-AU into my project. I'm hoping someone can just confirm that my design will work or that I'm not making an obvious errors with my PCB layout/design. Below are my schematic layout and PCB layout in KiCAD. This is a two layer board. Green represents the bottom layer, red the top layer. C4, C5, etc at the bottom left of the pcb image is the boost converter and can be ignored.

I should mention that the boost converter is outputting 5.1V. The reason for 5.1V instead of 5.0 is programming the IC for the boost converter is done with two resisters and is given in the datasheet as Vout = 0.6V (1+ R1/R2). Since this is being assembled by JLCPCB and I'm attempting to use as many basic components as possible this was the best that I could do. It's my understanding that running the AVR chip at 5.1V should be acceptable.

I'm planning on programming the factory blank chip using THIS ISP programmer. I'm planning on using a custom made pinout of pogo pins so I've rearranged the ISP layout to make it easier to run traces to the chip. My question is, since the ISP programmer supplies 5V, is it acceptable to run the 5V traces to the 5V lines that power the chip, also is R13 set up correctly or do I need to have a separate trace run from the reset pin of the chip and to the reset pin of the ISP programmer or can I just do what I've already done in the PCB layout?

Another question I have is for pin 18 which is the AVCC pin. My understanding is its suppose to be used for analog signals but if not needed it can be attached to the VCC pins. Have I done this correctly, does it still need to be connected to 5V on its own with decoupling caps?

My last question is about the crystal (X1). Originally I had designed this as a four layer board, however I decided against that since it appears a two layer board is sufficient. In the original four layer board design I had the crystal isolated on a separate ground plane with only one trace leading to the rest of the ground around it. Now since I'm only using two layers I'm concerned that it isn't isolated enough. The other issue is that the ground for one of the switches is directly underneath the pins for the IC that the crystal connects to. Will this level of isolation be enough for 16mhz operation? As it stands I have a copper exclusion zone around the crystal and only two ground traces connecting with the rest of the ground plane around it.

Any help with these questions is very much appreciated!

2

Your schematic is missing pins on the 328P symbol. The missing ones are critical.
Make sure you get a 0.1uF cap on each VCC and AVCC pin.

Tweak your ICSP to be standard, will make life less complicated all around.
4.7K might be strong for a reset pullup. I'd go with the standard 10K.

I'd strongly suggest to bring out Rx/Tx/Gnd out to a couple of pins you can use for debugging at least. 5-6 pins for FTDI Basic or equivalent would be great for serial downloading, you seem to have room.
Don't forget Ground planes on the top & bottom, anyplace there are not signals.
Add some Ground vias to connect the two planes.
Crystals are usually spec'ed to have a ground plane under them.

3

Thank you for your response.

CrossRoads:
Your schematic is missing pins on the 328P symbol. The missing ones are critical.

I'm aware of the missing pins, 3 GND, 5 GND, 6 VCC, 21 GND, they've all been connected properly.

CrossRoads:
Make sure you get a 0.1uF cap on each VCC and AVCC pin.

So the AVCC needs to be connected to its own 5V trace? I assumed since the other VCC inputs are decoupled I could simply connect AVCC to them.

CrossRoads:
Tweak your ICSP to be standard, will make like less complicated all around.
4.7K might be strong for a reset pullup. I'd go with the standard 10K.

I'm going to be making a custom jig to hold the board and then depress it into the pogo pins, which will have wires leading to the ISP programmer so layout isn't important in this respect. Although you're right in general. Isn't a 4.7K resistor less than 10K? I thought I was making it easier to keep the pin high, what am I missing here?

CrossRoads:
I'd strongly suggest to bring out Rx/Tx out to a couple of pins you can use for debugging at least. 5-6 pins for FTDI Basic or equivalent would be great for serial downloading, you seem to have room.

The code has already been tested using a pro-trinket and is complete. I'll have no need for debugging as once the code is loaded it won't be touched again, its a one and done setup.

CrossRoads:
Don't forget Ground planes on the top & bottom, anyplace there are not signals.
Add some Ground vias to connect the two planes.

I forgot to mention that the PCB layout isn't showing the copper pours, I'm using via to connect to the bottom layer for ground and I'm running signals and power traces on the top layer. However both layers are using cooper pours.

CrossRoads:
Crystals are usually spec'ed to have a ground plane under them.

So in this case it would be accept to forget about the exclusion zone and just wire it directly to the chip then?

Other than the above mentioned points do you see any other issues with this layout? Thanks for your time.

4

Other than the missing caps, no. Each VCC and AVCC should have a 0.1uF cap located next to it.

5

CrossRoads:
Other than the missing caps, no. Each VCC and AVCC should have a 0.1uF cap located next to it.

So If I were to simple leave the traces going from AVCC to the VCC pins as is and place a cap beside the pin would that suffice or would better practice be to bring a separate 5V trace to that pin and have it go through that cap first? Below is a photo of what I'm talking about, I've highlight the decoupling cap in purple, is this acceptable?

6

Yes. Do the same for pins 4 & 6.

7

CrossRoads:
Yes. Do the same for pins 4 & 6.

They already have decoupling caps on them, they're C9 and C12