CPLD and Arduino - a good mix

Hi, as I saw a lot of topics where the people are looking for challenging solutions where the Arduino itself cannot be fast or complex enough, I spent few hours playing with an XILINX CPLD - a free programmable hardware device, fast and cheap :slight_smile:
I’ve got this breakout board http://www.seeedstudio.com/depot/xc9572xl-cpld-development-board-v1b-p-799.html?cPath=174 , but you may get a lot of similar ones at ebay cheap.
XC9572XL has got 34 free and 100% rootable 5V tolerant I/O pins and 72 logic cells so you can implement quite a complex wiring. As an example I’ve created a 32bit counter, which connected to Arduino can serve as a counter, frequency and period measurement gadget etc. The sketch is very simple - just controlling the CPLD and receiving the results (32bit counter value) and printing the results. Enclosed is the schematics of the counter (as I don’t like to mess with VHDL :slight_smile: ) as well.
BTW, on an ordinary breadboard it measures up to 80MHz (maybe more - I found only an 80MHz canned oscillator in my junkbox…)
p.

/*
    Arduino and an CPLD XC9572XL - 32bit counter
    Pito 8/2012
 */
//  http://www.seeedstudio.com/depot/xc9572xl-cpld-development-board-v1b-p-799.html?cPath=174
//                  +-----------+
//           GND    |   CPLD    |
//           3V3    |  XC9572XL |
//          NCLR 22 |           |
//         NLOAD 23 |           |
//         NGATE 30 |           |
//          NCLK 31 |           |
//       NCLKOUT 32 |           |
//        SEROUT 33 |           |
//                  +-----------+


#include <DigitalPin.h>

// define the control signals of the CPLD
// NGATE - it opens the counter for incoming signal
#define NGATE  4
// NCLK - input of the 32bit CPLD counter
#define NCLK 9
// NCLR - clears the CPLD's counter
#define NCLR   5
// NLOAD - loads the counter content into 32bit serial shifter
#define NLOAD  6
// NCLKOUT - clocks the serial shifter out
#define NCLKOUT 7
// SERIN - input of the data from the CPLD's SEROUT serial shifter
#define SERIN  8

void setup() {   

  Serial.begin(115200);  
  
  // initialize the digital pins
  fastPinMode(NGATE, OUTPUT);  
  fastPinMode(NCLK, OUTPUT); 
  fastPinMode(NCLR, OUTPUT); 
  fastPinMode(NLOAD, OUTPUT); 
  fastPinMode(NCLKOUT, OUTPUT);
  fastPinMode(SERIN, INPUT);
  Serial.println("CPLD Test Starts");
}

void loop() {
  //default signals are HIGH, active LOW
  fastDigitalWrite(NGATE, HIGH);   
  fastDigitalWrite(NCLR, HIGH);
  fastDigitalWrite(NCLK, HIGH);
  fastDigitalWrite(NLOAD, HIGH);
  fastDigitalWrite(NCLKOUT, HIGH);
  Serial.println("CPLD Test Loop");
 
  while(1) {
    
  //clear the 32bit counter  
  fastDigitalWrite(NCLR, LOW);
  fastDigitalWrite(NCLR, HIGH);
  
  //gate the counter input
  fastDigitalWrite(NGATE, LOW);
  delay(1000);
  //delayMicroseconds(1);
  fastDigitalWrite(NGATE, HIGH);
  
  //load the 32bit counter value into the serial shifter
  fastDigitalWrite(NLOAD, LOW);
  fastDigitalWrite(NCLKOUT, LOW);
  fastDigitalWrite(NCLKOUT, HIGH);
  fastDigitalWrite(NLOAD, HIGH);
 
  
  //read the value from CPLD's serial 32bit shifter
  int i;
  unsigned long count = 0;
  for (i=0; i<=31; i++) {
      count = count << 1; 
      count = count + fastDigitalRead(SERIN);
      // clockout the shifter
      fastDigitalWrite(NCLKOUT, LOW);
      fastDigitalWrite(NCLKOUT, HIGH);
  }

  Serial.print("CPLD counter= ");
  Serial.println(count);
  delay(100);              // wait for a while
  }
}

counter1.jpg

These are nice. Every now and then I think about getting into some CPLDs but I can never really come up with an application that needs one.

I don’t like to mess with VHDL

I’m with you there :slight_smile:

I see the dev environment is about 6Gig+ to download, won’t happen in this lifetime I’m afraid, at least not until the mobile data plans triple in size for the same price.


Rob

I did some improvements there - I’ve put an internal oscillator (ring oscillator) in the CPLD, which runs at ~135.27MHz. There is an additional NSEL pin (selects internal/external oscillator as the source of the signal for the counter, you may gate the sources with NGATE) see below.

When running (atmega @ 16MHZ) and counter is sourced from internal oscillator and I gate it without a delay:
//gate the counter input
fastDigitalWrite(NGATE, LOW);
fastDigitalWrite(NGATE, HIGH);
//
I get CPLD counter= 17. So based on the internal oscillator frequency and counter value the delay between those two fastDigitalWrites measured is 125.67nSec. The internal CPLD ring osc. frequency has been measured with
//gate the counter input
fastDigitalWrite(NGATE, LOW);
delay(1000);
fastDigitalWrite(NGATE, HIGH);
//
and I read 135273234, stable on ~4-5 digits (the ring oscillator is temperature and voltage dependand).
P.

@Graynomad - Xilinx will send you a DVD with the latest development package free of charge, just do register and request it. I got it in a ~week in my post.
You need few GBytes free on your HDD, but frankly, when you understand digital the learning curve is steep as you need just learn few clicks with creating a project, select the device, then draw the schematics (like Eagle, but much simpler), assign the pins (few lines text file), synthetise/compile - one click), and flash (about 3-4 clicks). You need a programmer, I am using an LPT based one - 4diodes, 4resistors and 3V3 voltage reg… and it works ! :slight_smile:

Xilinx will send you a DVD with the latest development package free of charge, just do register and request it.

I'll do that, thanks.

I got it in a ~week in my post.

It'll take a bit longer to where I live, but no rush.

like Eagle, but much simpler)

Thanks goodness because I can't get to first base with Eagle :)

You need a programmer

Last I looked they had pretty cheap programmers.

I used PLDs in the 80s, I think they've changed a bit since then though.


Rob

I used PLDs in the 80s, I think they've changed a bit since then though.

Not much, they have just added a "C" :)

What has changed is the design environment. At home I used small 20-pin chips and the programmer cost $3500. Yikes! I still can't believe I spent that much on a programmer but all dev tools cost a lot then.

At work I used Altera 44-pin PLCC devices, I had to fly down to Sydney for a few days and design the internals on a mainframe CAD system.

Now we get a full dev system for free and run it on our laptops.

It's a brave new world alright.

BTW I used the 20-pin chips in my own dev product I sold, it was an EPROM emulator. Anyone remember EPROMs? Thanks goodness I don't depend on that income any more :)


Rob

I ahve kind of curious about CPLDs as they seem like an amazing design space and would like to give them a try the only concern is a compatible programmer. Could someone point me to programmers for that CPLD that I could use. It seems like I have collected a few boards and programmers over that never quite mated up with a development environment, now I try to reduce the rate at which components go in the box.

Thanks wade

The simplest CPLD programmer is with the FT232RL (arduino's usb serial chip) - see

http://openschemes.com/2011/10/28/ft232-bit-bang-jtag-programmer-revision-0-11/

http://openschemes.com/2011/10/25/bit-bang-jtag-programming-of-xilinx-cpld-using-ft232-homebrew-svf-player/

@pito. would you be willing to share the CPLD code? Would save a lot of people the headache of redoing (maybe wrong) the counter.

Thanks!

Enclosed pls find:
schematics file
svf file
xsvf file
ucf file

All under CC BY-SA… Provided as-is, no warranties of any kind.
Pito.

permeasure2.xsvf (52 KB)

permeasure.ucf (293 Bytes)

permeasure2.sch (19 KB)

permeasure2.svf (169 KB)

pito:
Enclosed pls find:
schematics file
svf file
xsvf file
ucf file

All under CC BY-SA… Provided as-is, no warranties of any kind.

Can you post a pdf of the schematic?

The schematics is the count2.jpg in this thread..

@Pito, Thanks for sharing your work!